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Registered Member #190
Joined: Fri Feb 17 2006, 12:00AM
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Posts: 1567
I need to isolate some leads from cross-talk. Would having islands of copper around the traces help? Do they all need to be connected together to ground?
If a trace has to cross another would using shielded wire work?
Registered Member #63
Joined: Thu Feb 09 2006, 06:18AM
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Posts: 1425
Hey Jonathan,
You should be aiming to keep big, nasty signals inside shielded coaxial cable away from your PCB, and small, sensitive signals on the PCB with a proper groundplane. Can you be more specific about what you're working with? Photographs would help.
IamSmooth wrote ...
Would having islands of copper around the traces help?
No, just pouring orphan fills can couple noise and transmit it to other parts of the board (though you might soften adjacent signals by loading them down with stray capacitance...)
wrote ...
Do they all need to be connected together to ground?
Yes, that is a good start if the sensitive signals are swinging against ground. You want the ground trace to be as close as possible. Pretend the signals are balanced pairs and imagine where you would route their partner.
wrote ...
If a trace has to cross another would using shielded wire work?
No, signals are not so well-behaved to only interfere with each other when their paths cross! Look in terms of return currents: where can you improve the symmetry of the path? Exiting your high-current signals from the circuit in shielded coaxial cable would help.
You can try to: * orient independent signals perpendicularly instead of parallel, * move the two signals physically further apart, * run return lines (or planes) under the signals, * make sure the power rails on the chips that generate the signals are properly decoupled, * minimize the loop area enclosed by those lines, * slow the edges (lowering currents) of digital signals with a filter,
A good technique is to consciously route your paths as pairs first. I.e. don't just route "Pin3 of a 555 to Pin2 of a UCC" -- make sure you route Pin8 of the 555 to Pin8 of the MOSFET right underneath it.
Once you have routed all your signals as pairs, you may confidently pour your groundplane knowing there are no inadvertent discontinuities or funny long paths. Then if you later increase the spacing/isolation, you won't accidentally lose important ground paths.
Here's a particularly painful example of why copper pours aren't a fix-all. I have picked two random (OK, I cheated to show you the worst case) points on the ground plane (the yellow dots) and traced the path between them (the yellow line). See how the board is split in half?
See also how adjusting the isolation (and shrinking the fill away from the traces) has actually disconnected the ground pin of the leftmost chip, not to mention the absurd length of the path? A re-route is in order...
Registered Member #63
Joined: Thu Feb 09 2006, 06:18AM
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Stella has a good technique. It's especially handy when home-etching and there aren't enough layers on the board. "U.FL" and "IPX" are the magic words to search for. These tiny receptacles can be surface-mounted, and the pigtails aren't too expensive on eBay.
Registered Member #190
Joined: Fri Feb 17 2006, 12:00AM
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I've been reading a little. I've seen with two-sided boards the use of a ground plane under digital chips using fast clocks. If I have a ground plane under the chip, where are my lead connections? Are they on the suface with the GND connection going to the rectangular section of copper underneath?
How good is this technique for a return path for RF?
Registered Member #190
Joined: Fri Feb 17 2006, 12:00AM
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Here is the inverter section for my induction heater. I have separated this from the main circuit board. I have a border of copper going around.
The inputs are to the left and will be from two optocoupled signals going through shielded wire. They will drive the INV and NON-INV gate drive chips. These are powered with their own 15v. They will drive a gate drive transformer, which controls the IGBT gates.
Can I improve anything here? This section is probably a major source of noise as the currents go up.
Registered Member #63
Joined: Thu Feb 09 2006, 06:18AM
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IamSmooth wrote ...
Here is the inverter section for my induction heater. I have separated this from the main circuit board. I have a border of copper going around.
The copper perimeter won't do much unless it is unbroken and connected to something. You would probably do better to make the board a bit bigger and spam it with copper pour connected to GND.
wrote ...
The inputs are to the left and will be from two optocoupled signals going through shielded wire.
Since you already have magnetic isolation with the gate-driver transformers, you may be able to eliminate the optocouplers and connect directly.
wrote ...
They will drive the INV and NON-INV gate drive chips. These are powered with their own 15v. They will drive a gate drive transformer, which controls the IGBT gates.
* put a big 100uF electrolytic capacitor on your 15V line, * more decoupling capacitors on the supplies of the gatedrivers, * more DC-blocking capacitors on the gate-drive transformers (lets you run a trace underneath), * link the two TC442X ICs' rails underneath the sockets so your groundplane can flow around, * have you tried removing the 5V1 zeners to see whether they affect performance?
wrote ...
Can I improve anything here? This section is probably a major source of noise as the currents go up.
* insulate the MOSFETs from their heatsinks and ground them, if you aren't already, * if you're still having problems with the PIC, consider enclosing it and the inverter in separate metal boxes, * your large "high voltage GND" traces may be radiating noise into other inputs, * look at the loops enclosed by your half-bridge, and try to squash those traces closer together, * I like to use separate gate-drive transformers because I pretend it makes the layout more symmetrical, * you could separate your planes into 'SGND' and 'PGND', then scope them to see the noise!
I have had a play here, it might help visualize some of these points... you get the idea. Optimizing the layout of your control / PIC circuit board is just as important, if not more critical, since that's where the noise hurts!
Registered Member #190
Joined: Fri Feb 17 2006, 12:00AM
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Thanks. I'm going to try to make some of these changes. how do I insulate the igbts from the heatsinks and still allow good heat transfer? Is there a material that I can buy from Digikey to act as a layer between them?
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
In general I would not recommend putting a ground-plane underneath traces in a high-voltage high-frequency switching inverter. This is likely to make switching noise problems a lot worse and can harm efficiency...
You normally want to keep HF switching noise caused by the high dv/dt confined to the power circuit that generated it, NOT capacitively couple it into the low-side signal ground where it can interfere with other more sensitive electronics.
The added capacitance between the switching node and ground plane must also be charged and discharged on every switching cycle. When operating at high-voltage and high-frequency this charge gives rise to significant additional switching losses in the MOSFETs.
If you must shield switching nodes it is best to keep the shield some distance away to decrease stray capacitance. And the return path should be to the power-side 0v rail, (i.e. the sources of the bottom MOSFETs) to keep the switching noise confined to the power side.
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