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4hv.org :: Forums :: General Science and Electronics
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Sinking GDT waveform

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Weston
Sun May 17 2009, 02:51AM Print
Weston Registered Member #1316 Joined: Thu Feb 14 2008, 03:35AM
Location: Cambridge, MA
Posts: 365
I am testing the gate drive circuit of my upcoming 1 kw smps and have running into some problems. The gate drive output sinks in a very odd pattern. I am using a transistor full bridge to drive the GDT. The output waveform is the same with or without the testing capacitor. Here is a picture. Thanks in advance. IM000321
1242528702 1316 FT0 Im000321
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twist2b
Sun May 17 2009, 02:56AM
twist2b Registered Member #2086 Joined: Tue Apr 21 2009, 02:33AM
Location:
Posts: 117
with AND without a cpacitor? You obviously don't have it hooked up right? Something has to be wrong with the oscilloscope. However, can you post the schematic... otherwise I am just leaving probable issues.
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Weston
Sun May 17 2009, 03:03AM
Weston Registered Member #1316 Joined: Thu Feb 14 2008, 03:35AM
Location: Cambridge, MA
Posts: 365
If I hook up the test capacitor (not DC blocking capacitor) to the output of the transistor full bridge WITHOUT the GDT the waveform is perfectly flat. When I hook up the GDT to the full bridge I get that waveform no mater the size of the DC blocking capacitor (I have tried from 200 uf to 8 uf)
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syntroniks
Sun May 17 2009, 03:09AM
syntroniks Registered Member #1530 Joined: Tue Jun 10 2008, 03:34PM
Location:
Posts: 32
The capacitor you are talking about: it is the one in series with the GDT, right? I have gotten away with less than 10uF but it depends on application. Whenever I omitted the capacitor, the driver would explode ;)

What are you loading the secondary of the GDT with? Are you using a MOSFET or using a model (series resistor, capacitor to ground) and then measuring the voltage?

What is the peak voltage and what voltage does it settle to? If this is loaded and the peak is < breakdown and the settled voltage is large enough to not be linear, you should be good to go.
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Weston
Sun May 17 2009, 03:16AM
Weston Registered Member #1316 Joined: Thu Feb 14 2008, 03:35AM
Location: Cambridge, MA
Posts: 365
The capacitor that I was changing the value of was the the one in series with the GDT. I am simulating the load with a capacitor/resistor. The peak voltage is about 16 and it drops to about 7, a bit to close to the linear region for comfort.
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...
Sun May 17 2009, 04:01AM
... Registered Member #56 Joined: Thu Feb 09 2006, 05:02AM
Location: Southern Califorina, USA
Posts: 2445
Try adding more turns to your gdt, i suspect you are saturating.

Also, are you sure you are using a good bipolar, low ESR cal for the dc block? You mentioned a 220uf cap which would be quite large for a cap of the quality necessary for the dc block.

What is the operating frequency?
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Weston
Sun May 17 2009, 04:15AM
Weston Registered Member #1316 Joined: Thu Feb 14 2008, 03:35AM
Location: Cambridge, MA
Posts: 365
The operating frequency in about 20is khz. I have raised the frequency but I still get the same waveform. The DC blocking caps are poly film for the lower values tested and photoflash for the larger values (still bypassed by poly cap)
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Kolas
Sun May 17 2009, 06:13AM
Kolas Registered Member #102 Joined: Thu Feb 09 2006, 08:15PM
Location: Raleigh, NC
Posts: 169
I Agree with ...
It is very typical to use a .1uF cap
Try that. also, your simulated gate seems too small. try 10nF
Kolas
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Weston
Sun May 17 2009, 06:24AM
Weston Registered Member #1316 Joined: Thu Feb 14 2008, 03:35AM
Location: Cambridge, MA
Posts: 365
I cant add more turns to the GDT it is from coilcraft. I tried a .1 uf blocking and I got a horrible wave form. Here is a pic.
IM000324
1242541440 1316 FT69582 Im000324
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Kolas
Sun May 17 2009, 06:38AM
Kolas Registered Member #102 Joined: Thu Feb 09 2006, 08:15PM
Location: Raleigh, NC
Posts: 169
Ok it looks like your GDT is too low permeability, if you raise that frequency you should see the gate waveforms squaring out. can you post a pic of what you get?
Kolas
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