Active/delayed pull down gate drive
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Dr. Dark Current
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Tue Jul 01 2008, 09:03AM
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Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
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I'm designing a current fed inverter where cross-conduction of switching transistors is a must, but it should be only in the tens of ns range.
I want to drive the transistors with GDT, I can leave pull-up to diodes but I need some kind of active, delayed pulldown, prefferably with just 1 transistor and few passive components.
I saw one thread on this subject here but the links to schematics in it are no longer working. Any ideas?
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GeordieBoy
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Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
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If you only need a few 10's of ns of conduction overlap just use RCD "slow-down" circuits on the secondary windings of the GDT to slow down the turn-off edge of the drive waveform.
You will find that typical power MOSFETs like the IRFP460A have a longer turn-off delay than turn-on delay anyway when the gate resistance is small.
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