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4hv.org :: Forums :: General Science and Electronics
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Dr. Dark Current
Thu May 01 2008, 03:59PM Print
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
I'm building a fully-adjustable HV power supply with current limit feature. The current is sampled from the cold end of the (rectified) HV transformer and used to modify PWM of the driver. However there is one probem - as the current limiting becomes active, the transformer starts to emit audible squealing noises or tones.
How to fix this without adding too much components to the existing circuit?


1209657497 152 FT0 Feedback



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GeordieBoy
Thu May 01 2008, 05:00PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
I think the 680R current sense resistor wants to be connected from the bottom of the transformer to ground. (ie across the 220nF cap) Otherwise the full load current must be drawn from the PWM summing node. This is not a good idea if you drop a s/c on the output.

Closed-loop stability in current-limit mode is determined by the same criteria that are required for closed-loop stability in constant-voltage mode. It works exactly the same but now the current loop takes over controlling the duty ratio instead of the voltage loop.

-Richie,
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Dr. Dark Current
Thu May 01 2008, 05:19PM
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
GeordieBoy wrote ...

I think the 680R current sense resistor wants to be connected from the bottom of the transformer to ground. (ie across the 220nF cap) Otherwise the full load current must be drawn from the PWM summing node. This is not a good idea if you drop a s/c on the output.
The 680R and 220nf cap form something like a lowpass filter, the main sense current is drawn from Vcc through the current limit adjust resistor (2.2k). I don't know what do you mean by "summing node", the circuit works "well" as it is even with shorted transformer output ("well" with some squealing). The current drawn from the 10k resistor is minimal.


GeordieBoy wrote ...

Closed-loop stability in current-limit mode is determined by the same criteria that are required for closed-loop stability in constant-voltage mode.
Well I don't know what are the criteria needed for closed-loop stability in constant voltage mode, do you have any links or online papers on the subject?


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GeordieBoy
Thu May 01 2008, 05:42PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
You would normally keep the current sense resistor small in value so it does not dissipate excessively due to the load current flowing through it. You also do not want the load current to flow through the 2k2 resistor down from the 18V low-voltage supply. If you s/c the output the instantaneous s/c current before the current-loop gets it under control will be forced through the LV supply which is not good.

Normal practice is to use two error-amplifiers with OR'ed outputs fed to the input of the PWM comparator. That is why the TL494 is set up like that. One error amplifier senses the output voltage, compares this to the setpoint and outputs an error signal to control the duty-ratio. The second error amplifier senses the output current, compares this to the I-limit setpoint and outputs an error signal to also control the duty-ratio. Whichever error amplifier commands the lowest duty ratio wins the fight and takes control of the PWM comparator.

Control loop compensation is a big topic and the exact design depends heavily on the power electronics. In short you want high gain around the control loop at DC for good regulation, a wide-bandwidth, and sufficient phase-margin up until the crossover frequency where the total gain around the loop falls off to unity. Control loop compensation is about placing poles and zeros in the feedback path in order to compensate or augment those already present in the behaviour of the power electronics. Feedback loops break into oscillation when this is got wrong, and there is either insufficient phase-margin or gain-margin.

If you do a search for the terms "feedback compenstion", "buck type-II compensation", "phase-margin" etc you will get a good start...

Some theory here:

Link2
Link2

And an excellent introduction to SMPS compensation for a buck converter here:

Link2

Hope this helps,

-Richie,
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