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Too fast gate drive kills FETs

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Dr. Dark Current

Sat Dec 01 2007, 06:35PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

This has been always a mystery for me. When I started building first higher power flyback drivers (half-bridge) with just the relatively slow IR2153 driver and little IRF740 FETs, everything was fine and I just rarely blew a FET.

Then I started boosting thegate drive outputs using TC442x chips and that's where the problems started: The mysterious IGBT/FET deaths. Even a high current device failed long before it should.

Recently I've built a half-bridge driver with 3x IRF740 per "leg" with very fast gate drive (TC4422's with practically no gate resistance) which was driving 2 flybacks. As I started raising the power, few of the FETs failed short (this was still at relativly low power).
Out of curiosity I took two of the non-dead FETs and connected them just to IR2153 (this time I used just 1 flyback) and of course- they survived!

This (and other things) has led me to conclusion that in hard-switching applications, too fast gate drive is a BAD thing. Use as slow gate drive as possible, just when the additional switching losses (resulting from the slow gate drive) become noticable.

I'd like to hear any opinions on this as it looks like an absurd thing to me, but it seems it's really like that (from more than a year experience of messing with half-bridge drivers).

I'd really like to experiment with various gate drive schemes and their effects on transistors life but this is out of question as I would need a sponsor for this

J.M.

Avalanche

Sat Dec 01 2007, 09:17PM

Registered Member #103 Joined: Thu Feb 09 2006, 08:16PM
Location: Derby, UK
Posts: 845

Yes - there is usually no need to drive the gates that quickly at all. I think there's a bit of a common misconception that you always have to use gate drivers on mosfets, and that sharp edges are a good thing.

Whilst it may save on switching losses, it just creates loads more problems: ringing on the gate, destroying the gate (as the voltage flies above the maximum gate voltage) but most likely (in your case) turning off an inductive load too quickly. Other problems are EMC related, fast edges on power devices create havoc (and noise).

The exception is any soft switching / resonant topology - where a fast gate drive will have more advantages than disadvantages.

So keep the switching speed down! Even a 4000 series logic gate with a suitable series resistor is enough for driving mosfets this small in most applications (depending on frequency of course, and obviously you need a bootstrap arrangement or similar for the highside). If you want to save on losses, look towards using mosfets with a lower on resistance instead.

Steve Conner

Sat Dec 01 2007, 09:43PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

You are absolutely right.

Dr. Dark Current

Sun Dec 02 2007, 11:53AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

So is there any "rule of thumb" for the "sweet spot" of gate resistance that should be used? Something like x ohms per 1/nF of gate capacitance?

Avalanche

Sun Dec 02 2007, 12:58PM

Registered Member #103 Joined: Thu Feb 09 2006, 08:16PM
Location: Derby, UK
Posts: 845

not really, because it all depends on your application and the characteristics of your devices...

But there are a few general rules I guess, like I mentioned turning off an inductive load too quickly - this can create emf that can exceed the voltage rating of your device in some cases - so you can work out your maximum allowable rate of change of current (dI/dt) and make sure that it stays within the voltage range of the mosfet.

Remember that what you define as fast/slow switching is going to be relative to your overall switching frequency in a continuous application! Allow a sensible percentage for your rise/fall times, I'd aim for no more than 5%. You then work out the gate resistor value from the RC time constant, the 'C' part being the gate capacitance of the mosfet (Ciss in the datasheet).

Another rule of thumb would be to not let the gate resistor value to get too large, for your slowed down switching. Probably not an issue here, but once you get over about 1k, I'd start getting worried about the gate of the lower device turning on due to capacitive coupling to the gate from the drain, when the top device turns on and the bottom one is supposed to be off. Not to mention picking up noise from other switching nearby. If your gate resistor is too high, charge can build up on the gate because it has nowhere to go - and the bottom device can turn on slightly (miller capacitance). If you need to go above about 1k for whatever reason, it's perfectly acceptable to add gate capacitance, by putting a small ceramic cap between gate and source. Keeping the gate drive impedence low is quite a good idea. 1k is probably a bit on the safe side for small things.

Something else to take into account would be how long your device spends in the linear region during slow switching - the dissipation during this time should not exceed the maximum 'junction to thermal' rating. I'm delving into almost irrelevent detail here so I'm just giong to shut up now

So you wanted a rule of thumb... between 0 ohms and 1k, depending on application.

Steve Conner

Sun Dec 02 2007, 01:01PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Well, it depends on so many other factors that a simple rule of thumb can only get you so far. It's best to adjust the gate resistors by trial and error till you find the spot where your MOSFETs run coolest and your scope waveforms don't show excessive nasty spiking.

You sometimes see two resistors and a Schottky diode so you can tune the turn-on and turn-off independently. I spent some time optimizing these networks in some small DC-DC converters that I designed at my last job.

When it comes to Tesla coils I just use 10 ohms for everything

Dr. Dark Current

Mon Dec 10 2007, 06:01PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

sorry to bring up old thread.. but I was wondering, I still don't understand exactly why this happens. Aren't there any papers that explain this phenomenon?

nrhoades

Mon Dec 10 2007, 06:38PM

Registered Member #610 Joined: Wed Mar 28 2007, 09:44PM
Location: Middletown, RI
Posts: 110

Your FETs are destroying themselves because they are exceeding a maximum rating. The question is, which rating? And which ratings are related to switching speed?

Latch-up happen when you exceed the peak diode recovery dv/dt. In other words, you do not want your drain-source voltage to change faster then the dv/dt rating.

Pretend you want to switch 100V at 500kHz, and your dv/dt = 2V/ns and your total gate charge = 200nC. What should your gate resistor be?

The fastest you can switch without latching-up the FET is: 100V / 5V/ns = 50ns.
You will probably want to derate this value to be safe. Lets make it 100ns.

100ns is 1/20th of your switching frequency, if thats something one can live with.

The current needed to charge the gate capacitance in this short time is: Q/t = 200nC/100ns = 2A.

You want to make sure that the input current doesn't exceed 2A. So if your gate drive voltage is 15V: V/I = 15V / 2A = 7.5 ohms.

Someone might want to double-check my logic.

Dr. Dark Current

Mon Dec 10 2007, 08:30PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

nrhoades, I believe the diode no longer conducts before the switching transition.
I think there must be a maximum dv/dt and/or di/dt rating for drain voltage rise or drain current fall. The funny thing is that I've not seen any datasheets that specify this.

Marko

Mon Dec 10 2007, 09:33PM

Registered Member #89 Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145

I guess the short answer is - no, too fast gate drive can't kill mosfets.
Actually only heat can. (even when you overvolt the gate).

To be safe with gate use zeners on the gate. Gate resistors are nice because they move heat away from the driver and reduce ringing, but they should be dimensioned *only just right*.

If you need to go above about 1k for whatever reason, it's perfectly acceptable to add gate capacitance,

I don't think so.

1k is probably a bit on the safe side for small things.

Very hardly unless you are talking about Hz range applications.

Something else to take into account would be how long your device spends in the linear region during slow switching - the dissipation during this time should not exceed the maximum 'junction to thermal' rating. I'm delving into almost irrelevent detail here so I'm just giong to shut up now

Very relevant detail, most relevant detail. I don't know why all these fast gate drivers were invented then.

You sometimes see two resistors and a Schottky diode so you can tune the turn-on and turn-off independently. I spent some time optimizing these networks in some small DC-DC converters that I designed at my last job.

yes.

Jan:

Have you tried scoping the gates in operation? How do they look with and without supply voltage?

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