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Registered Member #222
Joined: Mon Feb 20 2006, 05:49PM
Location:
Posts: 96
In an integrator configuration, an active inverting integrator will sometimes have the output voltage to sag below ideal values in what is called droop.
The transfer function of the integrator is Vo/Vi = -(1/R)(R2/(R2*C*s + 1))
where R and C are the integrating components and R2 is the parasitic resistance across the integrating capacitor.
So what can be done to compensate for the sagging of the voltage? Apparently there are some algorithms that can do this, but google reveals nothing of substance.
Registered Member #193
Joined: Fri Feb 17 2006, 07:04AM
Location: sheffield
Posts: 1022
IIRC thjere's a trick where you take the output from the integrator, feed it to a voltage divider then take the output of the divider through a large resistor to the inverting input of the amp. The idea is that this feeds current into the cap as fast as the parasitic resistance drains it. To work the poduct of the large resistor and the division ratio of the divider has to equal the effective leakage resistance across C. Unfortunatley, this will be horibly temperature and voltage dependent so you can't null it perfectly.
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
The easiest way is to use a large plastic film capacitor with very low leakage, a FET-input op-amp with very low input bias current, and guard rings in your board design etc.
Registered Member #72
Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
Where is the bulk of this 'parasitic' resistance coming from?
Is it a real, large resistor you have put there to ensure that the output doesn't ramp off to rail when the input is near zero? If so, then you have a low pass filter with huge gain, not an integrator.
Is it actually parasitics, that is the capacitor leakage, board surface contamination tracking etc? If so, then once you have taken Steve's suggested precautions to reduce the effects, you will be left with a zero drift that's dominated by the amplifier leakage current, which is going to look like a near-constant ramping of the output in one direction or the other, not a droop always headed towards zero. There are some tricks to use the bias current from one amp in a dual to compensate the bias in the other, but if you start with a very low bias current opamp, then it's difficult to mirror these currents well, and you are still left with amplifier tracking errors.
Some integrator applications are able to cope with resetting the output to zero periodically, to mitigate the effect of drift.
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op amp droop compensation
