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"Titch" SSTC

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thedatastream

Mon Dec 11 2006, 04:07PM

Registered Member #505 Joined: Sun Nov 19 2006, 06:42PM
Location: Yorkshire!
Posts: 329

The aim for Titch is to make a small, desktop sized demo coil that can be run from a PC power supply. It will also give me a chance to try and run it as a USB powered coil. Based on Derek Woodroffe's small coils, Titch will use two IXDD414 IGBT drivers in a full bridge configuration to drive the primary.

The secondary is based on a plastic tub that some AVX capacitors came in. It took about 1 hour to wind - 450 turns of 0.063mm wire wound on an old (but good) transformer winding machine at work in a lunch hour. That includes the one I wound before to get the wire spacing right. It's still not perfect; I might have another couple of goes to get it as good as possible.

Controller is still on the drawing board - I want to do audio modulation, so it sounds like a TL494 driver like the Plasmasonic is the way to go.

However, I'm not sure I understand how the feedback works on the Plasmasonic - it looks like the oscillator is fixed in frequency and is biased up more as the bridge voltage increases, reducing the frequency to account for plasma loading. Am I right?

Q: What are the tradeoffs (if any) to using a fixed frequency driver for audio modulation instead of a tracking oscillator based driver?

I was thinking about using Steve's PLL cct to antenna sense the voltage (that phase adjust facility is tres bon), slaving the TL494 oscillator from the PLL squarewave output, then modulating the audio by varyuing deadtime in the Plasmasonic stylee. This way the coil is properly locked to the correct freqency.

Comments?

James

...

Mon Dec 11 2006, 04:16PM

Registered Member #56 Joined: Thu Feb 09 2006, 05:02AM
Location: Southern Califorina, USA
Posts: 2445

I do believe that the Plasmasonic is biased by the voltage coming into the bridge. Because the coil is either full on/off (none of the just-out-of-tune like a pll coil) it will run at a fixed frequiency, so long as the input voltage is constant.

I believe the advantage to using a pll driver is that the fets are not 'hard switching', so it should run cooler. Check out the size of the heatsinks on dan's coil...
But the advantage of the pwm coil is that the sound (should be) a better representation of the source signal (more linear)...

Steve Conner

Mon Dec 11 2006, 04:46PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

If you want the audio modulation by PWM, or FM-to-AM conversion, then you can't have soft switching, no matter whose circuit you use.

If you figure out how to modulate deadtime of a PLL, you get a giant cookie, I couldn't

My Mk2 PLL circuit had deadtime variable by a pot, but I couldn't figure out how to modulate that.

thedatastream

Tue Dec 12 2006, 08:19AM

Registered Member #505 Joined: Sun Nov 19 2006, 06:42PM
Location: Yorkshire!
Posts: 329

... wrote ...
I do believe that the Plasmasonic is biased by the voltage coming into the bridge. Because the coil is either full on/off (none of the just-out-of-tune like a pll coil) it will run at a fixed frequiency, so long as the input voltage is constant.

What do you mean by "...coil is either full on/off..."? The PWM deadime varies with the audio input putting the coil in the full range of power levels. Or are you referring to the mains input voltage being on or off?

Assuming that the bridge voltage is proportional to streamer output, this bias resistor would decrease the oscillator frequency with higher bridge voltages / streamer output. Streamer loading compensation is the only thing that springs to mind.

Steve Conner wrote ...
If you want the audio modulation by PWM, or FM-to-AM conversion, then you can't have soft switching, no matter whose circuit you use.

So presumably, during the PWM "off" periods, the fast diodes in parallel with the MOSFETs start to conduct?

I'm going to lash something up with a PLL / 494 and see how it goes.

Thanks for the tips,
James

Sulaiman

Tue Dec 12 2006, 01:04PM

Registered Member #162 Joined: Mon Feb 13 2006, 10:25AM
Location: United Kingdom
Posts: 3141

I am currently pondering an SSTC powered by a 12V 7AH VRLA Battery.
One scheme I'm considering is-
Producing c300V dc for the ??SSTC invertor with a 494 invertor
(to try to get efficient battery usage)
This intermediate 300V dc supply could be audio-modulated I think
to modulate the SSTC power output at audio frequencies.

I haven't tried yet so let me know if you do!

thedatastream

Thu Dec 14 2006, 01:08PM

Registered Member #505 Joined: Sun Nov 19 2006, 06:42PM
Location: Yorkshire!
Posts: 329

I wrote ...
I'm going to lash something up with a PLL / 494 and see how it goes

I'm a funny man.

Looks like synchronising a TL494 (for deadtime) to a 4046 PLL (for frequency tracking) is not as easy as it first seemed. The TL494 needs a sawtooth waveform on it's CT input to sync to, and converting a square wave to a sawtooth wave of the correct amplitude was not something I really wanted to do. I suppose you could do it with a current source, cap, op amp and a transistor to reset the cap voltage...

Anyway, I took up Steve's idea of controlling deadtime on a PLL and I think I've come up with a proof of concept design in SPICE after a day of work (see the attached image).

SCHEMATIC

1166101083 505 FT18856 Jp Pll Deadtime Concept

Explanation as below:

The VCO timing capacitor is in phase with the VCO output normally used as the output from the DWSSTC PLL circuit. It's also a ramp so we can use it to generate some deadtime-PWM-ness. A sawtooth would have been much better but beggars can't be choosers. The ramp is AC coupled and buffered so that the output of X3 is centred on 0V

The audio (or indeed other control voltage) is buffered by X1 (unity gain non-inverting) and inverted by X2 (unity gain inverting). These are fed into the output comparators, where they are compared against the PLL oscillator ramp.

Because I'm comparing against a triangle which changes polarity with the the output voltage, there is a slight phase difference in the comparator output and the PLL output signals. Also, the duty cycle can go above 50% - not good for driving the full bridge. For this reason, the comparator outputs are logical AND-ed with the PLL output to get drive signals for each half of the full bridge.

Maximum output is achieved by shorting the audio input to -5V.

These are the drive outputs with a 20kHz sine wave input

1166101240 505 FT18856 Drive Out Vs Audio In

Downsides to the circuit

There's a requirement for some good quality op-amps / fast comparators and the requirement for a negative supply. I'm going to look at biasing the op-amps to 1/2Vcc to eliminate the need for a -ve rail and run the whole thing off 12V.
There is also a slight asymmetry in the drive signal pulse widths which could cause problems. It's probably due to voltage offsets or phase differences somewhere in the circuit.
You have to watch the audio amplitude, otherwise the outputs can turn off completely and clip the audio
Also this is designed in "Disneyland" where everything is perfect. Prototyping in the real world could be a whole new ballgame.

I'm going to play around in SPICE a bit more and then lash it up and see what happens.

Steve Conner wrote ...
...If you figure out how to modulate deadtime of a PLL, you get a giant cookie...

Do I take the biscuit?

Comments / questions welcome.
James

Steve Conner

Thu Dec 14 2006, 02:38PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Hi James,

Some things I seem to remember from playing around with this, and related projects at work:

The UC3526 is almost identical to the TL494, except it has... a sync pin

I've managed to sync TL494s by using a transistor driven by narrow pulses at the desired frequency to briefly short the timing capacitor to ground, discharging it a bit. I think I'm more or less emulating what the sync pin on the UC3526 does. There's a whole load of ways like this to sync oscillators, the jargon word is "entrainment" IIRC. For instance you can put a resistor in series with the cap, and couple in small positive spikes through another cap.

The 4046 uses a push-pull type of oscillator, where alternate sawtooth cycles appear on alternate ends of the timing capacitor. If you scope between any one end of the cap and ground, every other cycle appears to be missing. I don't know if that's what you meant by "A ramp rather than a sawtooth".

I don't know about cookies, but if you can get it to work in hardware, I have a James Clerk Maxwell 175th Anniversary Cake for you. (or a photo of one scanned from Physics World at least)

thedatastream

Thu Dec 14 2006, 03:23PM

Registered Member #505 Joined: Sun Nov 19 2006, 06:42PM
Location: Yorkshire!
Posts: 329

Hi Steve,

Steve Conner wrote ...
The UC3526 is almost identical to the TL494, except it has... a sync pin

Yeah, I've literally just been looking at the TI shortform and have seen a few promising looking devices. I think I shall probably investigate this road first rather than building the butchered circuit you saw before you.

Steve Conner wrote ...
The 4046 uses a push-pull type of oscillator, where alternate sawtooth cycles appear on alternate ends of the timing capacitor. If you scope between any one end of the cap and ground, every other cycle appears to be missing. I don't know if that's what you meant by "A ramp rather than a sawtooth".:-)

That's interesting - it's not what the simulation seems to suggest. In SPICE, you get a traingle wave on one pin of the device and then nothing (ground) on the other. That could put a stop to the above cct working.

I'm going to figure out which control IC from TI that will do what I want and then order some samples

EDIT: The UC3825 looks promising

James

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