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Slow ramp, fast deramp woes

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Pinkamena

Mon Sept 21 2015, 09:44PM

Registered Member #4237 Joined: Tue Nov 29 2011, 02:49PM
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Posts: 117

Good evening (or day, depending on your location) fellow 4HV members!
I've been gone for some time, but now yet again find myself in the position of needing your electronics expertice, as my own knowledge simply isn't enough.

Onto the problem: It's quite simple. From a 5v square pulse I require circuit that generates a slow ramp to a maximum value of 2-4v during this pulse, and deramps quickly when the 5v pulse goes back to 0v. To give you an idea of the timescales, the slow ramp is on the order of 100ns to reach its max value, and the deramp is as fast as possible, preferrably less than 5ns to get back to 0v. The ramp would ideally be linear and stop at some value between 2v and 4v, the deramp can have whichever shape as long as it goes to 0v, or a value below 1v, as long as it is reaches this value quickly and is stable. It's not a one-shot thing, so I can't have the previous pulse affecting the next one, for example by shifting the start level of the ramp. The ramp has to be quite well-defined and not change from pulse to pulse. As long as the start value of the ramp, the ramp shape, and the deramp end value are all constant from pulse to pulse, it doesn't matter much exactly what these values are.

I have 5V and -5V rails to work with. I have already attempted the circuit attached, which resulted in a nice slow inverse exponential ramp due to the capacitor charging through the resistor. However, when the 5V pulse ended, the capacitor did discharge quickly, but not all the way to 0V, merely close (to the schottky diode forward voltage drop) and then very slowly decreased to 0v as the capacitor slowly discharged through the closed schottky diode. I get the same result without the transistor. This won't do, as one of the main requirements is that the voltage stays stable after the deramp.

A bit more info: The 5V square pulse comes from a comparator, so it is limited as a current source. The comparator is an ADCMP551. The ramp is fed to the input stage of another ADCMP551. The input capacitance is negligible, 1pF.
I hope this is all the information required, and I look forward to hearing your suggestions.

Dr. Slack

Tue Sept 22 2015, 06:32AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Not sure what Q1 is doing here, apart from putting another diode drop in sereies with the schottky.

Not enough information on the exact specifications of the pulse, so does it have to stop at vhi? How stable must the vlo portion be? How soon after the ramp command should it start ramping? I could suggest circuits, but they might compromise other unstated specs. It usually happens that not all the unstated specs are obvious, until a suggested circuit breaks them.

So, try this suggestion for size. Vhi determined by pulse timing, Vlo stability with whatever you get from either an NPN or a FET shunting device.

Have a current source from 5v, could be a resistor which gives an inverse exponential ramp, or could be a PNP with an emitter resistor to 5v with a fixed base voltage. Current source goes to a grounded C. Current value and C value determine the up ramp time. A grounded FET or NPN connects the C to ground. When the base (or gate) is driven, the capacitor is discharged back to nearly zero. 'Zero' is the NPN vsat, or the FET RDSon * current source value. Very simple as there's no need to inhibit the current source. You'd need to invert your drive logic sense to use this, which I presume you would find trivial? Saturated NPNs can be slow to turn off and start the ramp, things can be done about this.

Pinkamena

Tue Sept 22 2015, 08:23PM

Registered Member #4237 Joined: Tue Nov 29 2011, 02:49PM
Location:
Posts: 117

Thanks for the reply, Dr. Slack, but I came to a solution with help from another forum. Just posting it here in case someone else stumbles upon the thread with the same problem in the future.

1442953431 4237 FT173251 Fast Ramp Circuit

johnf

Wed Sept 23 2015, 06:38AM

Registered Member #230 Joined: Tue Feb 21 2006, 08:01PM
Location: Gracefield lower Hutt
Posts: 284

pinkamena
yes that looks much better with the current mirror (the top two transistors)supplying a constant current through the resistor to the capacitor this is a classic sawtooth waveform generator as used in oscilloscopes tv's etc

Dr. Slack

Wed Sept 23 2015, 08:27AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

I'm not sure by how much this two-transistor current source improves on the single transistor source I was suggesting, but it does the same job. I wouldn't describe it as a current mirror, it doesn't even have particularly high output impedance, witness the curve in the ramp.

Using a PNP device for the clamp means you don't have to invert the drive logic. It also doesn't saturate, which means the ramp starts faster than were you to use an NPN clamp. Given you can tolerate 0.7v offset, that's a better solution for the clamp than a NPN.

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