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Registered Member #9925
Joined: Wed Jan 30 2013, 08:07PM
Location: Rochester MN
Posts: 7
Hi everyone. Im a new member to this site, and fairly new to tesla coils. I am attemting to build a CWDRSSTC. I am not sure my driver is going to workout.
I am using the sg3525 running at around 55khz, output to a pair of ucc3732x driver chips.
A pair of 18turn GDT's (1:1:1 ratio each) with a nice output wave form.. into a full bridge of 600V IGBT's (APT100GF60JU2)
Power rail: 540V 3300uF Cap - for now I have only charged up to about 40V from a rectified variac.
Im am currently playing around with this, just as a simple SSTC. I wound up a 300uH secondary just for this purpose.
I'm getting maybe 5 or 6" arcs.. I put a short video of it on youtube.. "Beaus sstc" ..With a moderators permission i could add a link
I used Steve Ward's primary feedback circuit (zener "clipped sinwave") and planned to run it into pin 3(sync) of the SG3525. I was able to sinchronize a duplicate driver circuit (which was on breadboard) from the feedback, but it was not really stable.
I used a potentiometer to adjust this "duplicate driver" circuit's frequency. Successful sychronization with the feedback circuit would only occur when the SG3525 was set within a narrow range of frequency. This frequency i dont recall, but it was substantially lower than the Feedback... maybe half
The SG3525 datsheet has limited information. I read somewhere that in order to synchronize the SG3525 with an external clock these conditions must be met:
1) The external clock signal must have a minimum 300nS pulse width but also the pulse width has to be atleast 200nS less than the SG3525 2) The SG3525 must have its frequency set 10% percent lower than the external clock
Main questions: * If I set the SG3525 to Fres-10%, will this cause big losses upon startup.. or maybe just the first cycle? * Is there any simple way to lower the duty cycle of the primary feedback square wave, after it passes though a 74HC14 inverter?
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