GDT driver / General Science and Electronics / Forums

Forums

4hv.org :: Forums :: General Science and Electronics

« Previous topic | Next topic »

GDT driver

1 2 next

Move Thread

LAN_403

Redstone

Wed Sept 12 2012, 02:47PM

Registered Member #2578 Joined: Sun Dec 27 2009, 09:21PM
Location: USA Utah
Posts: 31

I would like some help with figuring out why the wave form on the IRF740 gate looks really bad when the frequency goes below 48khz. it is not a sudden drop off, it slowly changes into the first one. I have tried different component values, yet it still looks bad. I am thinking of putting a resistor value on the gate of a transistor in the totem pole.

I have drawn the schematic and the two wave forms, I am not an artist. the wave form that has a one to the left is the wave form at 24khz. the one below with the number two to the left is it at 48khz

Don't anyone tell me it can't be done and do not even think of using an IC!

Here is the resouce

it is under transformer coupled gate drives near the bottem

Steve Conner

Wed Sept 12 2012, 03:02PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

You need flywheel diodes across your transistors to return the magnetising current to the supply. The lower you go in frequency, the worse the magnetising current gets.

Dr. Slack

Wed Sept 12 2012, 04:58PM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

What's the 1N4148 across the 740 gate doing? I mean, what's it meant to do, and what's it doing?

Redstone

Wed Sept 12 2012, 05:00PM

Registered Member #2578 Joined: Sun Dec 27 2009, 09:21PM
Location: USA Utah
Posts: 31

Ok looks nice now, How can I square this up? I am thinking run the voltage up on the totem pole to 25 volts and use a 15 volt zener on the gate.

go though the link in my first post and read a little. it explains it many times better than I can

Conundrum

Wed Sept 12 2012, 05:14PM

Registered Member #96 Joined: Thu Feb 09 2006, 05:37PM
Location: CI, Earth
Posts: 4061

Would adding flywheel diodes on 2SD965/2SD1812 based CCFl inverters stop them catching on fire when drawing arcs from the output?

I tried limiting the current, adding series capacitor, you name it. No go.

Patrick

Wed Sept 12 2012, 05:16PM

Registered Member #2431 Joined: Tue Oct 13 2009, 09:47PM
Location: Chico, CA. USA
Posts: 5639

once your significantly above the threshold voltage on the gate, does it matter if it droops out of square a bit? (as long as it remains above Vgth)

Redstone

Wed Sept 12 2012, 05:17PM

Registered Member #2578 Joined: Sun Dec 27 2009, 09:21PM
Location: USA Utah
Posts: 31

Same thing I was wondering

Patrick

Wed Sept 12 2012, 05:28PM

Registered Member #2431 Joined: Tue Oct 13 2009, 09:47PM
Location: Chico, CA. USA
Posts: 5639

Vgth moded for your wave form:

Once significantly above the red line (from your part numbers' data sheet) it should be ON in, low resistance. Once below, the transistor should be a resistor getting hot or totally OFF.

Dr. Dark Current

Wed Sept 12 2012, 07:12PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

The gate threshold voltage is when the FET or IGBT starts turning on. It is insufficient if the gate voltage is just above this threshold, it must be high enough to fully saturate the transistor. This usually happens with >10V for a MOSFET or >12V for an IGBT.

GeordieBoy

Wed Sept 12 2012, 07:34PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

LF droop is either caused by too few turns on the GDT, or too small AC coupling capacitors...

Things to try:

1. Put more turns on GDT to increase magnetising inductance and decrease magnetising current.

2. Increase the capacitance of the 0.1uF AC coupling capacitor. This value sounds too small anyway.

3. Increase the value of the 10k DC bleed resistor.

The 1N4148 diode causes the balanced bi-polar voltage appearing across the transformer secondary to be converted into a uni-polar drive for the MOSFET. It results in the 0.1uF capacitor charging on one cycle of the GDT waveform, and then adding this DC voltage to the GDT waveform on the following cycle. It works like the voltage doubler used in a microwave oven power supply circuit. Operation with GDT summarised below:

GDT waveform exists from v- to v+
results in capacitor charging to voltage v (minus one diode drop!)
and MOSFET gate voltage going from 0 to 2v (again minus one diode drop) when done properly

Actually figure 35 in that Unitrode application note listed in the OP's message explains it quite well.

In practice it takes several cycles to get the 0.1uF capacitor charged up so it works best in CW applications. It's not good in pulsed burst applications because the MOSFET may not get sufficiently enhanced to carry large load currents at the start of the burst of gate drive!!!

-Richie,

PS. You should also have a ceramic and 10uF-100uF worth of decoupling capacitance across the power rails right at the gate-drive transistors draw their current from the supply. Otherwise the fast switching of the transistors will bite chunks out of the supply rail voltage.

1 2 next

Moderator(s): Chris Russell, Noelle, Alex, Tesladownunder, Dave Marshall, Dave Billington, Bjørn, Steve Conner, Wolfram, Kizmo, Mads Barnkob