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Registered Member #610
Joined: Wed Mar 28 2007, 09:44PM
Location: Middletown, RI
Posts: 110
I am a theoretically-knowledgeable, but realization-inexperienced EE attempting to build his first RF amplifier from scratch. I'm looking for comments on my first draft design, posted below. I've used LTSpice along with the manufacturer provided SPICE model (the model includes package parasitics, I believe).
The amplifier consists of a 50-ohm impedance matching network, and two almost-identical cascode stages with emitter-follower buffers in between. The circuit will be driven from 50ohm coax and will output on 50ohm coax. The intended operating range is from 100kHz to 110MHz so that it can cover both commercial AM and FM bands. The goal is to use this as the RF amp in a homebrew superheterodyne receiver.
This circuit is from my own invention, so I don't know if I've broken any rules-of-thumb.
Here is a picture of the final circuit
AC analysis with a source of 1mV, 50 ohm source impedance. The voltage gain is roughly 40dB, so the power gain should be about 20dB.
Here are two different plots if the input impedance as seen from the source
An idea I had was to use negative feedback (opamps) to stabilize the temperature-dependent voltage drift in the NPN junctions. It worked out pretty well, though now the drift is at the mercy of the opamp temperature drift.
Why does the noise increase so much between the two amplifier stages? Perhaps this has to do with the 10dB of power gain from the first stage? Do I hear a segway into Noise Figure??
Noise at Vstage1 using V1 as noise source
Noise at Vstage2 using V1 as noise source
Noise at Vstage3 using V1 as noise source
Noise at Vstage4 using V1 as noise source
This is the circuit before I added bypassing components
...and the AC response. of 1uV of signal added to the power supplies
As you can see, the noise is amplified and this is undesirable. Whereever I could, I added inductors to block the power supplies, and capacitors to sink nodes to ground, so that all the signal sees is a nice clean ground plane.
Here is the modified circuit
...and the drastically improved AC response, filtering out power supply noise
After some rounds of feedback and redesign from you guys, I'd like to try building it. I have my own equipment, including an HP spec. an. and a VNA that goes from 0.1 to 180MHz.
Registered Member #1792
Joined: Fri Oct 31 2008, 08:12PM
Location: University of California
Posts: 527
The AC shorting caps on your power supply (C11 and C12) probably need to be smaller, a 100uF cap probably has a self resonant frequency below 1MHz. Often an array of small to high value capacitors is used in parallel: the small caps have high self-resonant frequency and can bypass high frequencies but don't do well at low frequencies; the large caps have low self-resonant frequencies so they can't do anything for high frequency signals but they are more effective at low frequencies.
You could probably safely increase the size of the blocking inductors, their impedance at 100kHz is pretty small.
I'm not sure how best to do this in Spice, but it's also worth looking into a stability analysis. Maybe a bode plot would be the best way to do it. Also worth checking the stability of your bias circuit as you do have an amplifier going around in a loop, again you could check that with a bode plot. Or just build it and see if you get unstable bias or spurious output signals on your SA with no input
Registered Member #29
Joined: Fri Feb 03 2006, 09:00AM
Location: Hasselt, Belgium
Posts: 500
I notice you use a transistor that has appreciable gain above 1GHz. You might find that the amplifier exhibits instabilities as a result of unexpected feedback at high frequencies (100s-1000s of MHz). Layout will be critical. It may be worth taking a slight hit on gain and using low-value resistors on the base and/or collector (close to the transistor body) to reduce the chance of instabilities.
My overall suggestion (from someone who has built his share of RF amplifiers from DC to 14 GHz) is to start with a single stage, common emitter amplifier. Stabilise this in a 50 or 75 ohm environment, then concatenate stages to provide the gain you want. The cascode stage on the input is a great way to get lots of gain and can be a very stable configuration, especially if you put a 10 ohm resistor (or thereabouts) between the CE transistor collector and the CB transistor emitter to make sure that there are no likely oscillations. Remember that PCB tracks (even short ones, especially if loaded at one end with a capacitor) are potential resonators at GHz frequencies. The maximum stable gain is often less than the theoretical available gain, particularly as operating frequency decreases. You will need to determine this from the device S parameters.
There are so many things to consider, it would be impossible for me to detail them all in a short forum post. Try to use good RF practice (short paths to ground, _small_ caps and lossy resistive networks in bias networks) and have a go building it! If it oscillates at first power-up (and I almost guarantee it will), don't worry! We have all been down that road! Have a go at stabilizing it and trying to squeeze your required gain out of the amp.
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