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4hv.org :: Forums :: General Science and Electronics
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Some PCB layout questions

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rp181
Sun Jun 05 2011, 03:05AM Print
rp181 Registered Member #1062 Joined: Tue Oct 16 2007, 02:01AM
Location:
Posts: 1529
I am working on a 4 layer PCB design, with the stackup as follows:
Signal
Ground
Power
Signal

I have a couple of questions. Is there any harm in using multiple voltages on the power layer? the majority will be 3v3, but some will be 5v (power input) and 1v (core supply) that will be routed like a normal route, though with larger areas.
Also, what kind of precautions should I take when routing the 20mhz clock signal? Right now it is routed through the bottom layer (8 mil trace), and about .5" in length.
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Dr. Slack
Sun Jun 05 2011, 06:14AM
Dr. Slack Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
Unless you are drawing a lot of current, or relying on widely-spaced shunt capacitors to nail your power for the whole board, you can (and should) treat your power supply as just another signal. 1v will be very intolerant of drops, so use a wide track. My conservative figure for copper is 20mohms, for a 1m length of 1mm2 conductor. Work out your copper thickness and width, and work out the resistance for drops, don't go on the default 1A per mm width default which is valid for temperature rise, not for volt-drop.

Generally, if your total trace length is less than lambda/20 (remember speed of light in PCB ~ 50-60% of c in free space) then you need take no precautions with the sending, trace between them or the recieving end, other than making sure it still calculates to work. Treat the trace as a lumped capacitance which your sender has to drive.

Once your trace length gets to lambda/4, you need to be worrying about termination. Doesn't sound like you're there yet.

Top-side signals only see ground, whereas bottom-side signals can couple with the power layer. Think about whether you want this coupling. Minimise by crossing traces at right-angles.

A very useful board layout techiniaue if you have two layers for routing is to do it "Manhattan" style, one layer goes E-W, the other layer goes N-S, and forget about power and signal layers. That way, using vias, you can always get from one point of the board to another systematically without your route being obstructed by prevously routined traces. Everything's going to couple, so use this pair for power and low quality signals, critical traces go on the top side where they only see ground.
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mikeselectricstuff
Sun Jun 05 2011, 10:12AM
mikeselectricstuff Registered Member #311 Joined: Sun Mar 12 2006, 08:28PM
Location:
Posts: 253
wrote ...

Top-side signals only see ground, whereas bottom-side signals can couple with the power layer. Think about whether you want this coupling. Minimise by crossing traces at right-angles.
A well-decoupled power plane is to all intents and purposes the same as ground for changing signals
wrote ...

A very useful board layout technique if you have two layers for routing is to do it "Manhattan" style, one layer goes E-W, the other layer goes N-S, and forget about power and signal layers.
This is fine for through-hole but doesn't really work for surface mount boards of any reasonable density due to the obstruction caused by part footprints.

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rp181
Sun Jun 05 2011, 01:46PM
rp181 Registered Member #1062 Joined: Tue Oct 16 2007, 02:01AM
Location:
Posts: 1529
Thanks for the in depth reply.

Mike is right, I don't think I can keep with that style, I will keep that in mind though. I may end up mounting components on both sides, however critical parts will stay on top. Here is a screenshot of the layout so far. The cyan layer is power (The large cyan polygon is the 1v), and the purple is the ground layer (supply later, so it is inverted). The clock is highlighted. The QFN chip in the middle is 10mm square, and most passives are 0402 for size reference.
The entire bottom right block is power regulation, 5v in and 3v3 and 1v out. I still need to add a 1.8v supply for the USB PHY.
MQAQ8
Any general comments about how I am laying it out? Each PCB run will cost close to $500, so I don't want to have to order 5 revisions...
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mikeselectricstuff
Sun Jun 05 2011, 02:01PM
mikeselectricstuff Registered Member #311 Joined: Sun Mar 12 2006, 08:28PM
Location:
Posts: 253
rp181 wrote ...

Each PCB run will cost close to $500, so I don't want to have to order 5 revisions...
Unless it's a pretty large board, that sounds very expensive for a prototype....
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rp181
Sun Jun 05 2011, 04:14PM
rp181 Registered Member #1062 Joined: Tue Oct 16 2007, 02:01AM
Location:
Posts: 1529
I just had it quoted from advanced circuits. Its 6/6, and 8 mil finished hole, and obviously 4 layer. I had it quoted for 5"x5".

Oh, and its $500 for 3 PCB's (also for 2 and 1 because of curves...)
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Dr. Slack
Sun Jun 05 2011, 04:42PM
Dr. Slack Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
wrote ...

A very useful board layout technique if you have two layers for routing is to do it "Manhattan" style, one layer goes E-W, the other layer goes N-S, and forget about power and signal layers.

This is fine for through-hole but doesn't really work for surface mount boards of any reasonable density due to the obstruction caused by part footprints.

I use it all the time on surface mount boards at work, but then I do use buried vias (even more expense). It's true that if your vias have to go full depth, it rather limits how useful it is.

The present board I'm working on is 10 layer, sig/gnd/sig/gnd with vias 1-4, then 5 and 6 are Manhattan, then gnd, sig, gnd, sig with vias 7 to 10.
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mikeselectricstuff
Sun Jun 05 2011, 09:10PM
mikeselectricstuff Registered Member #311 Joined: Sun Mar 12 2006, 08:28PM
Location:
Posts: 253
rp181 wrote ...

I just had it quoted from advanced circuits. Its 6/6, and 8 mil finished hole, and obviously 4 layer. I had it quoted for 5"x5".

Oh, and its $500 for 3 PCB's (also for 2 and 1 because of curves...)
Well here's a service at half that price: Link2
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rp181
Mon Jun 06 2011, 02:05AM
rp181 Registered Member #1062 Joined: Tue Oct 16 2007, 02:01AM
Location:
Posts: 1529
Should I still put a ground pour on the signal layers?
Here is an update:
JFIPX
Again, the large cyan pour is 1v. the purple is the invert of the ground layer.
Any glaring bad practices?
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Dr. Slack
Mon Jun 06 2011, 07:25AM
Dr. Slack Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
As you have already defined layer 2 as ground, you can leave it at that. Make sure that you haven't routed any last-minute tracks through layer 2, robbing it of continuity.

Don't pour grounds on signal layers (generally).

It is very unusual that it would fix a bad board.

It very common that it can f*c*up a good one.

By all means simplify the placing of additional grounds by outlining the area with a continuous track and pouring into the space. Just don't let it pour round signal tracks. A big area of copper is soometimes useful as a heatsink. Again, place it and delimit it carefully, don't just pour it.

If you need grounds between signals for isolation or impedance control, then put them in manually as tracks. It's too important to lose the control and hope the tools have done what you hoped they have.

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