cancelling inductance on a long wire pair / General Science and Electronics / Forums

Forums

4hv.org :: Forums :: General Science and Electronics

« Previous topic | Next topic »

cancelling inductance on a long wire pair

1 2 3 next

Move Thread

LAN_403

IamSmooth

Thu Aug 19 2010, 07:03PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

I have a long twisted wire pair connected across the leads of a high frequency capacitor. I am trying to measure the voltage and phase against the current. It seems that the inductance of the wire at the high frequency is affecting my measurements. If I can not change the wire, is there anything I can do like put a small capacitor in series or in parallel with the wire to decrease the effect?

Mattski

Thu Aug 19 2010, 07:21PM

Registered Member #1792 Joined: Fri Oct 31 2008, 08:12PM
Location: University of California
Posts: 527

If you put a capacitor in series such that freq=1/(2*pi*sqrt(LC)) then you can cancel the effect of the inductance, because the inductor has impedance j*2*pi*f*L and the capacitor has -j/(2*pi*f*C) and they cancel at this frequency. However, this only works at a single frequency. If you are measuring over a narrow bandwidth it's fine. If you want a more complex waveform like a square wave, it won't work.

IamSmooth

Thu Aug 19 2010, 07:29PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

It can be over a wide range.

The problem just might be a timing delay.

I am measuring a drive signal at the source - the chip. I measure the waveform across C after it goes through some semiconductors and lengths of wire. There may be a sufficient delay of the signal to cause the problem.

Is there a simple way one can compensate for timing delays other than deliberately incorporating chips into one of the signal paths?

klugesmith

Thu Aug 19 2010, 08:29PM

Registered Member #2099 Joined: Wed Apr 29 2009, 12:22AM
Location: Los Altos, California
Posts: 1716

The long twisted pair has distributed inductance and capacitance, so it's a balanced transmission line.
Characteristic impedance is often around 110 ohms, and velocity around 70% of c.
From those parameters you can directly calculate L and C, or vice-versa.

For broadband usage (large ratio between min & max frequency of interest), I think you can't avoid the prop delay. It will contribute a phase error directly proportional to frequency, which you can subtract from measured phase. Get used to it, or use similar length lines for all signals whose phases are to be compared. Perhaps you can choose a twisted pair length on channel 2, to match the delay of your favorite high impedance 'scope probe on channel 1.

If the twisted pair has more delay than a few degrees at the highest frequency of interest,
it should be electrically terminated to suppress reflections and standing waves.
That can be done with series or parallel resistors at the near end, far end, or both,
to deliver a high fidelity (but delayed) version of input waveform.
Termination topology and design depend on your application. Care to reveal more details? This document shows one way:

radiotech

Fri Aug 20 2010, 01:18AM

Registered Member #2463 Joined: Wed Nov 11 2009, 03:49AM
Location:
Posts: 1546

What lengh is the wire and what frequency ? Impedance of source and load in polar form would be helpful to know.
As Klugesmith said, this is a transmission line problem.

IamSmooth

Fri Aug 20 2010, 03:58AM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

Length is about 30cm. There is a 56k resistor in series. The frequency is between 50 and 120 khz. This does not include some of the line traces and chip delays.

radiotech

Fri Aug 20 2010, 06:34AM

Registered Member #2463 Joined: Wed Nov 11 2009, 03:49AM
Location:
Posts: 1546

At a f of 100khz no standing waves are going to be on a 30 CM twisted wire. the capacity of such a wire (guess) 30 uufd. Your 56k
resistor in series with the source would make the twist (c) and R be in quadrature, making a nifty phase shift with only .707 of the source voltage at the pair terminals. (open circuited) (doesnt matter which end),.

It's not inductance that is the problem.

How about an exact diagram of whats connected to each end of the pair.

You often see twisted pairs used on big scr's gate circuits. That is to prevent hugh magnetic pulses in that equipment from inducing phantom pulses . Is this why you clhose the twisted pair jumper?

IamSmooth

Fri Aug 20 2010, 01:10PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

The capacitor is part of the LC tank for my induction heater. The twisted pair connects to the 5.6uf capacitor and runs from the high voltage board to a separate unit that contains the driver circuitry. I choose the twisted, shielded pair to decrease any pulse that could be induced by the magnetic pulses.

How did you make your quadrature estimates? Are you just making a guess at the capacitive reactance of the wire?

I compare the capacitance voltage to the inverter voltage, which follows the gate drive. I tap into the gate drive for a dedicated measurement, and time this signal. Would my solution be to introduce a 56k resistor into this measurement line (I would not be putting it into the gate drive line)?

radiotech

Fri Aug 20 2010, 03:05PM

Registered Member #2463 Joined: Wed Nov 11 2009, 03:49AM
Location:
Posts: 1546

The 30uufd was an estimate (loose twist, etc) The reactance of 3ouufd is about 56 k at the median f of 100khz. Your resistance makes the wire a pivot around quadrature if f swings abot 1/2 octave.

At 100kHz the 5.6 ufd capacitor has a reactance of 0.3 ohms
and if you feed it through this 30 CM wire, you have a new problem, if the wire length loop 60 CM has a resistance close to 0.3 ohms
same problem as before.

Quadrature is when resistance = reactance.

As Klugesmitth said before "It will contribute a phase error directly proportional to frequency"

IamSmooth

Fri Aug 20 2010, 06:24PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

radiotech wrote ...

and if you feed it through this 30 CM wire, you have a new problem,

As Klugesmitth said before "It will contribute a phase error directly proportional to frequency"

I know there is a problem. What does one do about it? Right now, I simply compensate for it in the software algorithm.

1 2 3 next

Moderator(s): Chris Russell, Noelle, Alex, Tesladownunder, Dave Marshall, Dave Billington, Bjørn, Steve Conner, Wolfram, Kizmo, Mads Barnkob