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Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
The concept of time constant only has meaning for a simple RC circuit with one pole. If you add more poles, each one comes with its own time constant: the circuit as a whole doesn't have "a time constant", it has several. That holds even if they're all the same.
And, if you just cascade three RC sections, the resulting three time constants are all different, even if all the Rs and Cs are the same. This is because of interaction between the sections, so if you want three poles all the same, you need to buffer them from each other.
If you want a higher-order filter, a properly designed active filter will beat a bunch of RCs in most applications.
Registered Member #162
Joined: Mon Feb 13 2006, 10:25AM
Location: United Kingdom
Posts: 3140
Just to add to Steve's post,
- 'filters' is a huge subject, about one lifetime's study.
- there are sooo many types of filter some requirements are so common that specific ICs are available, everything from 5th-order audio lowpass filter to DSPs.
- for help with filters you need to be quite specific!
Registered Member #347
Joined: Sat Mar 25 2006, 08:26AM
Location: Vancouver, Canada
Posts: 106
You can get a pretty good high order filter by using RC sections in series, all of the same time constant, but making each resistance several times higher than that of the previous section. For example, have 3 sections in series, with RC values of (1k, 1uF), (10k, 100nF), and (100k, 10nF). Having increasing resistance minimizes loading on the previous stage. You will likely have to follow this with a hi-z op-amp buffer, because the output impedance is so high.
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
Well, for this particular application, filtering PWM, I probably would use a Bessel active filter, or the cascaded RCs. I actually designed a product for someone that did this, and it used two cascaded RCs with 10:1 ratio like David describes.
But you're asking "What filter will give the best ratio of PWM attenuation to settling time", and it's actually quite a complicated question.
For instance an elliptic filter could notch out the PWM carrier completely with a stopband zero, but they overshoot and oscillate when settling.
If it's that critical, probably best to ditch the PWM and use a DAC.
Registered Member #72
Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
I just want to filter a pwm output, and get as close to a pure DC value without a significant RC delay.
Mmmm, tough. What you're asking is akin to asking for the "best" and "cheapest" widget, the two are mutually exclusive, and there may be other factors about your widget, the colour for instance, that you haven't specified.
However, enough of analogies. When people want to filter a DC waveform that moves from one value to another, they often choose a Bessel response. This has no overshoot, though its delay will be greater than filters that do, like Butterworth, Chebychev, Elliptic etc. When Steve said design a high order filter instead of a random bunch of RCs, it starts with deciding what's important about your application, choose the least worst filter, and then specifying what level of bad things you can tolerate.
There are two bad things you have to tolerate in your application. One is the ripple generated by your PWM, the other is the overshoot. The first can be attenuated so much that it's negligible, the second can be eliminated all together, BUT either will lead to a filter with excess delay. If you decide you can tolerate (say) 1%, or 0.1% ripple and (say) 2% overshoot, then a filter can be designed that will have lower delay.
A very advanced filter is the equi-ripple phase (for constrained overshoot) with stopband zeroes (for ripple attenuation). This filter type was invented specifically for DAC reconstruction filtering, but there's absolutely no point in getting out the tables to design one of these without a specification for delay, ripple and overshoot.
Cascading several RC sections with the same time constant gives you an approximation to a Bessel.
What's the controlling specification for this filter. Is it within a control loop, so the delay is absolutely limited by stability concerns? If so, you'll have to compromise on ripple and overshoot. If the delay is just "smallish", then you can choose ripple and overshoot more freely.
Raising the frequency of the PWM signal will make everything easier for filter. If you are already topped-out on resolution and clock rate, then a fractional-N PWM could do this, either a MASH type used in CD players, or something based on the Chinese Remainder Theorem which can be easier to code in a micro controller.
How many times do we see this next observation in a post? Once you have specified what is important, then we can help advise you on a complicated compromise.
<edit> douf, collided with Steve Mc in the door there! </edit>
Registered Member #190
Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567
What is important? Hum...
I have maxed out my pwm frequency at 4khz. This give me adequate resolution to vary the duty, which will control my voltage to a PLL's VCO. This is for a control-loop.
I have learned that having the smallest delay is critical. Having a low ripple is also important.
I found this active analog chip based on your suggestion, Neil.
It is an 8th order filter. I just need to find out what kind of delay it has. I ordered a few samples.
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