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Registered Member #2683
Joined: Sun Feb 14 2010, 12:27AM
Location:
Posts: 14
Hi all, I'm new here, and have taken on a smps as a project, this is the first project I have ever designed from the ground up, but I'm now really stuck.
The goal is to produce 50 VDC @ 50 A when the duty cycle is at 90%. I have been successful with the control loop open, ie running at a fixed duty cycle of close to 90%. Now I'm trying to get the voltage feedback loop completed because of course when no load or minimal load is present, the voltage rises to about 60 VDC.
I'm using a UC3526 pwm controller and wish to monitor the positive voltage i.e. take the unregulated 50 VDC, and divide it and send it to the E- pin of the error amplifier.
I have used the equations in the data sheet to come up with a resistor divider but it doesn't appear to work correctly. Referencing the error amplifier in the DS, R3 is 9k, R2 is 10k and R1 is 90k.
The problem is that very small changes in voltage make dramatic changes in the duty cycle, for example a change of 100 mV changes the duty cycle to 50% or so. Is this what is supposed to happen? I would have expected a larger dynamic range over the entire range of 0 - 5 volts to the error amplifier.
If anyone has suggestions on this, I would really appreciate it.
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
KG7HF wrote ...
The problem is that very small changes in voltage make dramatic changes in the duty cycle, for example a change of 100 mV changes the duty cycle to 50% or so. Is this what is supposed to happen?
Yes. That's why it's called an error amplifier... it amplifies the error! This is necessary so that even a small error in the output voltage can produce enough of a change in duty cycle to correct itself.
Once you close the feedback loop, all should be well, unless you got the design of the compensation network wrong and the power supply goes unstable. Then the real fun begins
Registered Member #2683
Joined: Sun Feb 14 2010, 12:27AM
Location:
Posts: 14
Thank you, I'm starting to see that is the case through expirments. I thought it would be a much more dynamic response, for example 5 v would be 90%, 2.5 v would be 50% etc.
I believe I have the voltage divider correct, but who knows. That means when there is no or little load, the duty cycle is very very low. Perhaps this approach won't work for a wide range of load currents.
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
No, you need to think in a more negative-feedbacky way. The duty cycle will just always go to whatever it needs to be to make the output voltage what you set it to be, that's the magic of feedback. You feed the reference voltage to E+, and the feedback loop self-adjusts so that the voltages on the E+ and E- pins are the same. Therefore, the divided-down sample of the output voltage is held equal to the reference voltage, and that's how the output voltage is regulated.
If this thought scares you, you can degenerate the error amp. It's just a cheap and nasty op-amp (remember the golden rule of op-amps, "The voltages on the + and - inputs are always the same"?) and its output is available on the compensation pin, so you can connect a feedback resistor back round to E- and reduce the gain that way. But the above is how it's designed to work. The loop gain is very high at DC to give an accurate output voltage, and the compensation network decreases it at higher frequencies, to stop it oscillating and self-destructing. Well, you hope.
Registered Member #2683
Joined: Sun Feb 14 2010, 12:27AM
Location:
Posts: 14
Yes, I just destructed.
What seems to happen is since I have 60V unregulated at 90% duty cycle, when I put the voltage divider in the circuit must be oscillating at very low load (I can actually hear it). I think if I didn't have so much amplification, I could get a handle on the system.
At least to start off, it might give me better control so I don't kill any more fet's. How do I determine a resistor value to feed the comp pin back, say to reduce the gain by a factor of 100?
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
KG7HF wrote ...
Yes, I just destructed. ... How do I determine a resistor value to feed the comp pin back, say to reduce the gain by a factor of 100?
Sorry to hear it :(
Since it's an op-amp, it obeys the same gain equations as any other op-amp. Gain = -Rf/R1 for inverting mode, and 1+Rf/R1 for non-inverting.
Rf is the resistor you'll add between comp and E-, and R1 is just the Thevenin equivalent impedance of whatever stuff you have hooked up to the E- pin.
The only thing to watch out for is that the error amp has a really weak output stage, so Rf will have to be big.
When you have the feedback loop closed, you want to start off at low load and get it stable there. Bring the main power up on a variac (with a separate power supply for the UC3526 and so on, so it's always fully powered) and at the first sign of instability, stop and investigate!
Once it's stable at low load, start increasing the load and carefully exploring the boundary between discontinuous and continuous current mode. If it's going to go unstable, that's usually where it'll take off, when it goes into CCM.
If you've never heard of DCM and CCM, it's amazing that you got this far, but you maybe want to stop now and take up something safer and less challenging, like blindfold chainsaw juggling.
Registered Member #2683
Joined: Sun Feb 14 2010, 12:27AM
Location:
Posts: 14
thanks, believe it or not, I've never used an op amp.
I think it might be better to expirement with the switching voltage off and use a bench supply to input simulated error voltages, that way I can look at the pwm waveforms vs. voltage before actually applying switched voltage or loads.
blindfold chainsaw juggling... I needed a laugh right then. It has been a long trek to get this far actually, but reading and asking friends many questions to try to understand how it all works has gotten me pretty far. I've only wrecked about 2 FETs and a couple of resistors (knock on wood) so far.
At the begining, I wasn't going to implement any feedback and just run unregulated, but I thought what the heck, I might as well try it now that everything else is working. I've only been looking at the voltage feedback for a few days now
They didn't cover any of this sort of things in my computer science classes!
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
Oh, well kudos to you for getting this far! You've already got 2500 watts of DC out of it, that's pretty good going for a computer scientist And you've not got any MOSFET shrapnel in the eye... yet...
Unfortunately getting the feedback right is the hardest part of a SMPS design. I'm just a general EE, but I have a friend who used to design SMPS for a living and he sometimes drops by this forum. Could you post a schematic of what you've built so far?
In the meantime, try connecting a 100k resistor from the compensation pin back to E-, that should reduce the gain considerably.
PS: I see you're a ham: are you building this to power some huge solid-state RF amp?
Registered Member #2683
Joined: Sun Feb 14 2010, 12:27AM
Location:
Posts: 14
Thanks,
Well, two one side of the Hbridge was shot on that last one, so 2 more FETs. Still, not bad.
I thought the feedback would be cake compared to getting the magnetics figured out, the gate drive nice and clean, and the snubbing all good so the ringing would go away, actually that was the hardest part, the ringing was terrible at first.
Yes, this project is the power supply for a solid state HF amplifier in the KW class. The actual goal is to create a generic hbridge which can be reconfigured easily for 50, 100, or even higher voltages. The 50V works, I've had some limited time with switched out magnetics to produce a 2kv version.
I'll try the 100K resistor and post schematics, I should update them tonight with the latest good stuff.
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