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Gate Drive for SLR Converter IGBT H_Bridge

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GeordieBoy

Tue Feb 16 2010, 02:26PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

You would normally regulate the average current output of the Series Load Resonant converter by modulating the switching frequency. (Or more accurately "thinning out" the switching pulses.)

Each resonant cycle is a seperate discrete event that delivers a packet of energy to the output side. The controller normally fires sinusoidal cycles of alternating polarity through the series resonant circuit to produce that chopped-up sine current waveform that someone on here very kindly named "the buttock shaped waveform".

This waveform happens when there is no dead time in the switching cycle. i.e. Every sinewave cycle that starts positive is followed IMMEDIATELY by another sinewave cycle that starts negative. Likewise every negative going cycle is followed by another positive going cycle etc, etc.

When pulses are generated head-to-tail in this way the maximum average output current is generated from the converter. However, it is possible to decrease the average output current by decreasing the rate at which resonant pulses are generated.

For instance 50% current output is achieved by generating one complete positive going resonant cycle, followed by waiting for 1 cycle period of dead time, then one complete negative going resonant cycle, followed by waiting another 1 cycle period of dead time. Then the whole process is repeated.

Proportional control of average output current from 0 to 100% of the design value can be achieved by using this "thinning out" method on the control pulses to the IGBTs.

This is one example of a SMPS that uses switching frequency modulation to control the output current. Just remember that it is the repetition rate of the pulses that is being varied, NOT the pulse widths. (You can't just modulate the switching frequency and hold the duty ratio constant! The pulses that drive the IGBTs must maintain a constant width as the frequency is changed. If the pulse widths don't stay correct, the operation of the SLR will break down.)

A more crude bang-bang type of control can also be applied to the SLR where the gate drive pulses are simply disabled when the control variable is above the set-point and enabled when below the set-point. Whilst not as elegant as linear proportional control it may suffice for some capacitor charging applications in whichoutput voltage fluctuations are not a problem.

-Richie,

Peter02

Wed Feb 17 2010, 03:05AM

Registered Member #1488 Joined: Sat May 17 2008, 10:41AM
Location: Germany
Posts: 18

Hi,
thanks for the input.

@Finn Hammer
Yes, that is most likely the safest and simplest method and therefore maybe the best.
But this does not produce lowest ripple voltage because ripple will be proportional to hysteresis (im not so sure here), which is what i try to get around. For capacitor charging this might not be a big problem but i wanted to find a way with lowest ripple nontheless.

@Steve McConner
till now i always used the Mazilli + Regulated buck ( average current regulated 2.5KW diy bench top psu ) which worked great but is not very comfortable because of the size of it, therefore i wanted the ccps to run ofline.
If this regulation attempt fails i will fall back to just switch it off when the cap is full.

@GeordieBoy
good to know that this is the (or at least one) way to go.
Maybe i failed to say it right, but the circuit i posted does (or is intended to) exactly what you say.
The circuit creates one power cycle at each positive edge of a clock signal while the toggle flipflop makes sure that the polarity of the drive pulses change every cycle.
So in the end the frequency of the input signal determines the density of the power cycles which is what you said.
Since every cycle delivers a discrete amount of charge, the density of the pulses is proportional to the output current. So this makes a frequency to current converter.
Therfore i wanted to use a Voltage controlled Oscillator (lm331) to make the control circuit accepting a voltage as the regulation input for the output current.

At first i had thought of a much more complicated circuit with RS-Flipflops and more logic elements, but in the night i couldnt sleep (because i didnt want to build such a complicated circuit ) until i found the simplest way to make the Frequency to Pulsedensity-converter i could think of.
Instead of the ANDs i will use as FinnHammer stated the enable inputs to the gate drivers.

I have build it and tested with a frequency generator and it works good, "only" the regulation part has yet to be done.

Greetings
Peter

Steve Conner

Wed Feb 17 2010, 10:50AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

wrote ...
"the buttock shaped waveform".

Yes, and the output voltage is controlled by PCM: Pulse Cleft Modulation. :D

wrote ...

But this does not produce lowest ripple voltage because ripple will be proportional to hysteresis (im not so sure here), which is what i try to get around. For capacitor charging this might not be a big problem but i wanted to find a way with lowest ripple nontheless.

Yes, the other problem is that the ripple frequency will change depending on the load. At low output powers it could be well in the audible range. So you probably couldn't use this to power, say, a tube RF amplifier for ham radio, because it would add ripple sidebands to the signal that couldn't be removed without a huge filter, and this huge filter woud defeat the purpose of using a SMPS in the first place.

Maybe instead of a simple comparator to do bang-bang control, you can use a sigma-delta modulator, like they do in Class-D amps. The average pulse density would still be what's needed to make the desired output voltage, but the pulses would be randomly distributed and the ripple would be more like white noise. Or blue noise rather, since the sigma-delta performs noise shaping.

wrote ...

Maybe i failed to say it right, but the circuit i posted does (or is intended to) exactly what you say.

Yes that's what I thought too

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