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Registered Member #2292
Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795
I have been trying to obtain for some time now a large ferrite core for the GDT in my DRSSTC, with no luck trying to get one from TSC or any were else I have come up with an alliterative method of driving the bridge. The GDT will be driving a full bridge of first 30N60 IGBTs (miniblock) and then in the final design a full bridge of 60N60 IGBTs (also minblock).
My question is this, using Steve Ward's universal DRSSTC controller http://www.stevehv.4hv.org/new_driver.html could I drive the full bridge of IGBTs with 2 smaller GDTs (1 for each half of the bridge).
i've done that with those cores. you just have to parallel the primaries and it is fine. you should scope the secondaries while connected to the transistors so that they have the proper capacitive load or else the driver might blow up.
Registered Member #1225
Joined: Sat Jan 12 2008, 01:24AM
Location: Beaumont, Texas, USA
Posts: 2253
lightlinked wrote ...
i've done that with those cores. you just have to parallel the primaries and it is fine. you should scope the secondaries while connected to the transistors so that they have the proper capacitive load or else the driver might blow up.
Not to mention, you should give the fullbridge an input voltage, to make the reading even more realistic. The miller capacitance is higher with voltage applied.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
Yes, it works fine. I've always used seperate GDTs for the two bridge legs in inverters.
You can use two sets of gate-drive IC's too. Each set drives one GDT and controls the two devices in one bridge leg. This can give better gate waveforms than trying to stretch one set of drive IC's and a single GDT to drive everything.
Using seperate electronics to drive each bridge leg makes them independent if a fault developes on one bridge leg. It also lets you experiment with phase-shifting the drive to one bridge leg if you want to do this for power control.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
> Not to mention, you should give the fullbridge an input voltage, to make the reading even more realistic. The miller capacitance is higher with voltage applied.
The "Miller" capacitance of MOSFETs (Cdg) actually decreases with applied drain-source voltage.
It is the fact that current starts to be driven through this "Miller" capacitance as you increase the bus voltage that makes life progressively harder for the gate drive circuits.
I don't mean to nitpick, but device capacitances definitely fall with applied voltage. For common IRFP450 see Fig 5 top left of page 4 here:
Even though the capacitance falls with drain-source voltage, significant current can still be forced through a few pF of Cdg if the drain voltage slews over several hundreds of volts in a short time! That's what causes the familiar "Miller Plateau" in MOSFET switching circuits, and to a lesser extent with IGBTs.
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