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Registered Member #2172
Joined: Fri Jun 12 2009, 05:59PM
Location: Castelnuovo del Garda, VR
Posts: 4
Hi all! I recently replace my pll driver with Steve Ward's drrstc driver (the last version, with OCD...) cause i had some issues with feedback synchronization... Now, i tested the driver with my scope and signal generator and it works perfectly...but it seems that the feedback from my coil isn't strong enough to drive the circuit!
I tested it with 40V input. I'm using PRIMARY feedback. When the interrupter goes HIGH i've got a pulse on the GDT that has to start the oscillation in the coil via the bridge...BUT connecting my scope on the CT (2x 1:33 ratio...) i can see only a very little voltage spyke of about 100-200mV...so it isn't strong enough!!!
I also tried to connect my signal generator on the input of the feedback, running at the fres of the coil...now the coil works and from the CT i can see a very clear 4V PK-PK feedback signal...
So the driver isn't able to start the oscillation in the primary itself!
What can i do? Maybe i can rise the input voltage, but i don't have a variac....i culd use a voltage doubler to obtain 80 Vdc...
Registered Member #2172
Joined: Fri Jun 12 2009, 05:59PM
Location: Castelnuovo del Garda, VR
Posts: 4
Ok, i think i've found the problem!
When the interrupter signal is LOW both couple of IRF540/IRF9540 are off. When the interrupter goes HIGH, one of the UCCs puts his out HIGH and drives one couple of mosfet... The problem is that other two mosfet are still off! So one output of the driver is in high impedence!!! So the current can't flow into GDT because it hasn't a path to ground...
The strange thing is that Steve's driver works in that way!!! Why it works and mine doesn't?
Thanks in advance!
ps:I attached my shcematic so you can check this... ]driver.pdf[/file]
Registered Member #33
Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971
This is the reason why Steve Ward used a pair of and-gates to do the enable function, instead of the internal enables of the gate drive chips. The gate drive chips need to output high when they are disabled for this circuit to work, otherwise C10/C13 in your schematic will get charged, leading to the problems you experienced.
Registered Member #2172
Joined: Fri Jun 12 2009, 05:59PM
Location: Castelnuovo del Garda, VR
Posts: 4
Anders M. wrote ...
This is the reason why Steve Ward used a pair of and-gates to do the enable function, instead of the internal enables of the gate drive chips. The gate drive chips need to output high when they are disabled for this circuit to work, otherwise C10/C13 in your schematic will get charged, leading to the problems you experienced.
Anders M.
Oh....I feel like an idiot :P I didn't noticed that Steve's gate drivers were inverting!!! Thanks man, i'm going to modify my schematic...
Registered Member #3964
Joined: Thu Jun 23 2011, 03:23AM
Location: Valenzuela City
Posts: 332
What about if the gate drivers are inverting the signal? it only invert the signal's polarity from '1' to '0'(vice versa) so it will be the same except that the phase are a 90 degree different..
also,,. what do you mean by this?
The gate drive chips need to output high when they are disabled for this circuit to work, otherwise C10/C13 in your schematic will get charged, leading to the problems you experienced.
its confusing me.. please help me,. thanks in advance.
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Problems with primary feedback
