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Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
I'd be more interested in the AC impedance on the drain, than the DC level. If you've left it floating for your tests so far (and from the look of the results, I'm guessing that you have) try shorting it to the source and see if your results change.
Then you may want to ponder the so-called input and reverse transfer capacitances (Ciss, Crss) and how they relate to the Miller effect and the MOSFET's actual Cgs, Cgd, and Cds.
Also, I seem to remember that Cdg and Cds change radically with drain voltage, far more so than Cgs changes with gate voltage. So, the main non-linear effects may actually come from Cdg and Cds reflected to the gate circuit by Miller effect. GeordieBoy will know more on this, as he's built MHz Class-E amps where the non-linear capacitances can cause subharmonics and chaotic behaviour.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
+1 on everything Mr McConner said. You definitely need to do something with the drain. The options are:
1. Short it to the source. (Easy to do and repeatable!) 2. Put some DC bias on it, (allows you to see the effect of reverse transfer capacitance "Miller effect") 3. Connect it to whatever you intend to drive with it, eg Tesla Coil, work coil, antenna matching network etc.
If you leave the drain open circuit the Miller effect does still take place beleive it or not. You will see a voltage on the drain, and you will see a Miller plateau in the drive waveform with the drain open-circuit.
As Steve said, for practical applications the AC input impedance of a MOSFET can easily be dominated by the reverse transfer capacitance of the MOSFET. This is particularly so for high voltage applications like inverters and Class E amplifiers where the drain voltage can swing through several hundred volts during switching transitions. It is the current driven through Cdg that dominates the input impedance at this time, not the current through Cgs or its loss resistance.
The load impedance presented to the drain of the MOSFET also has a very heavy bearing on what the input impedance is looking into the gate!!! For example, try tuning a SSTC to drive a resonator just below it's natural frequency. Look at the waveform on the gate of the bottom MOSFET, then wave your hand near the resonator to bring the system into tune. You will notice the gate drive waveform change. If you bring your hand closer to detune it further you will see a further change in the gate drie waveform. This test is best performed at high voltage, but with relatively low power throughput, otherwise the TC might burn your hand off when it pulls into tune!! Seriously, though the drain and gate waveforms change quite noticeably as you tune from below the load's resonance, through resonance, and above resonance. The SSTC using MOSFETs is far from a simple static system!
When making HF amps like Class E and Class D these voltage dependent capacitances can make for unstable operation such as chaotic oscillations or frequency halving etc. They can also make the amplifier difficult to modulate in a linear way. At relatively low frequencies, like low HF, the solution is often to add shunt capacitance between G and S to swamp any variation caused by Cdg. This minimises detuning of the input network as the B+ rail is increased and the amplifier starts to produce power. At low frequencies a little additional Cgs is usually not a problem. At higher frequencies, a shunt resistor will usually damp the effect by making the input impedance primarily resistive instead of capacitive. Switching amps are usually like 90% efficient so a few watts of drive power burnt up in "gate damping resistors" is a small price to pay for increased modulation linearity.
Finally, in general a given MOSFETs input impedance is the sum of all or less of the following:
1. Gate capacitance Cgs 2. Reverse transfer capacitance Cdg 3. Package and bond-wire inductance 4. Gate polysilicon or metalisation resistance 5. Rds(on) coupled back through Cdg 6. Cds coupled back through Cdg 7. The external drain load impedance coupled back through Cdg
Unless you are using resonant sinewave drive, you can usually combat them all in switching applications by driving the MOSFET gate with the fastest stiffest kick-ass squarewave you can generate. Maybe with a little damping resistance.
Registered Member #2040
Joined: Fri Mar 20 2009, 10:13PM
Location: Fairfax VA
Posts: 180
Well it appears to me that I would need an entire different setup to measure the effects of drain impedance. I'm thinking I can use a sine wave signal generator with a series resistor connected to the gate, I can then measure the voltage drop across the MOSFET. Knowing the series resistance I can calculate the magnitude of the input impedance via the voltage drop. I can also have a low value shunt resistor in series. I can then compare the series current via the voltage drop across the shunt, to the voltage across the FET and come up with a phase angle. If I have the magnitude of impedance and the phase angle I can find the capacitance and ESR. All with varying loads on the drain. That's my initial idea anyway, comments and concerns are welcomed.
The whole thing is pretty useless if using square wave drive, like you said Richie, but I was attempting to delve into the higher frequency SSTCs. I was thinking 11MHz as a start, and as you know square wave is hard to produce and inefficient at those frequencies. My thought was to use a resonant drive because, in a very simplistic model at least, it could be extremely efficient, depending on the Q of course. Much to my surprise the input capacitance isn't very conducive to resonant voltage rise. That's what got me interested and how this all got started anyway.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
If you are just wanting to lash up a high frequency switching amplifier for hobby use, then I would recommend choosing a power device then designing an input matching network that you can adjust. If you look in RF Engineering textbooks you will see matching networks consisting of L's and C's that allow you to match the input impedance of MOSFETs (or bipolars) to a standard 50 ohm impedance. All you typically need to do is make two of these components variable. Two degrees of freedom allows you to tune out the reactive part of the MOSFET's complex impedance, and transform the real part to something more practical.
When you go up and up in frequency, it becomes quite hard to measure the actual input impedance of the MOSFET in a practical way. Sometimes it is easier to design a matching network that provides a good match to 50 ohms, and then infer what the actual MOSFET's input impedance must have been.
That's what i'd do for hobby use. All you need is an RF power source, and an SWR meter. If you are trying to write a paper on this subject though, you might want to use something called an RF Network Analyser or VNA. Such devices quickly generate plots showing real/imaginary impedance, magnitude/phase, transmission/reflection etc against a frequency axis. You can therefore quickly assess how these parameters change when you substitute a different device, or tweak one of the matching networks.
Registered Member #2040
Joined: Fri Mar 20 2009, 10:13PM
Location: Fairfax VA
Posts: 180
OK, thanks for the ideas. I have no intent to write a paper, but I do like to learn as much as I can during a project. Anything I can learn on this project should make the next on easier.
Registered Member #2040
Joined: Fri Mar 20 2009, 10:13PM
Location: Fairfax VA
Posts: 180
Well like Richie and Steve said the input impedance could be more dependent on the drain impedance and voltage than anything else, making my graph pretty much useless. Unless you need a $1 nonlinear capacitor with that exact curve, then your in business!
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