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wind interface box: a circuit to divert excess current when a certain voltage is exceeded

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Dr. Slack

Tue Nov 25 2008, 10:04AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Have you heard the expressions "when life sends lemons make lemonade" and "it's easier to ride the horse in the direction it's going"

The horse I'm referring to is the behviour of FETs, the lemon is FET's liking for fast switching.

Just to complicate choices further, have you considered using the FET in switch mode duty?

Let's say you have a duty cycle modulator, which produces (for example) 0% width pulses below 400v, (V-400)% from 400 to 500v, and 100% above 500v (quite easy to do with a triangle wave oscillator and a comparator). Feed this into the gate of a FET (or two paralleled perhaps), with a 50R resistor to rail. With a sutiable choice of rail capacitor value and oscillator frequency, the effect will be that the switched resistor will draw a time-average current from the rail and dissipate time-averaged power, with a nominal amount of voltage ripple on the DC rail capacitor (but make sure it's small enough for your inverter to handle). Not an inductor in sight, and little heating and avoidance of 2nd breakdown in the FET. Switching losses in the FET can be kept miniscule with a fairly low (1kHz perhaps) switch frequency, and a good fast gate drive signal; the FET heatsink will become very easy.

Just a thought.

IamSmooth

Tue Nov 25 2008, 01:53PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

Sounds interesting, but I am unfamiliar with this. Can you explain further, provide a diagram or a link I can read about this? I believe I understand the concept: provide a switched power signal, rather than a constant one to dissapate the heat better. THis will work as long as the voltage on the rail never exceeds Vmax when the shunt is on or else the inverter will get destroyed.

Dr. Slack

Mon Dec 01 2008, 08:19AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Issue of FETs v IGBTs. If we ignore the speed issue and only go for forward volt drop in conduction, then a rule of thumb is that for any given current, if rail <100v (ish) FETs always win, > 500v IGBTs always win, between 100v and 500v use either and it depends on the particular device you've chosen. As the speed requirement goes up, FETs take more of the business.

For *your particular duty*, is there anything wrong with designing a "power relaxation oscillator"? The plan is, rail >500v (or whatever), turn the shunt on, rail <490v (or whatever), turn the shunt off. This way, both the generator and the inverter see an average of 495v, with 5v peak ripple on it. I'm sure the generator would be happy with a load with a slightly ripply voltage on it. I'm sure the inverter would cope with a slightly ripply supply. Or you could test these.

There is little point in building a linear shunt (with SOA and stbility issues), or a PWM power supply (with inductors, spikes, stability issues, efficiency complications), when your requirements are a) to waste 100% of the power coming your way and b) hold the rail to a mechanical device which doesn't care about voltage or ripple, and an inverter which can take a wide range of input voltages, so shouldn't care about voltage and ripple within limits.

The oscillation period is controlled by rail capacitor and by the delivered generator current on the way up, and by the resistor shunted current-generator current on the way down. Though your rail capacitor will have to be good for the rms current.

If you assume your 50R load resistors draw 10A at 500v, then the worst case rms heating current would be when the generator is delivering 5A at 500v.

If you assume 100uF rail capacitor, then 5A will charge or discharge it at 5/100u = 50kV/s, passing through the suggested 10v hysteresis band in 200uS. You would therefore have a 2.5kHz oscillation, well down in the IGBT range of frequencies. With a larger rail capacitor, the frequency would be lower.

With delays in the comparator circuit, the swing would be greater than the actual comparoator hysteresis set.

The supply to the IGBT/FET driver could be trickled at a few mA from the 500v rail, even though the driver really needs to supply hundreds of mA to the gate to get rapid switch-on of off through the transient SOA of the device (I strongly suspect that IGBTs will have the same SOA problem as bipolars and FETs). A decent rail capacitor on the 15v driver supply will support the tranasient gate switching current, which will have a very low average.

There are several ways to do a comparotor with hysteresis, and there are several waysto do a FET/IGBT driver, maybe even a 555 as it will drive 200mA into a gate, and has comparator inputs. But a component comparator and beefier FET driver might be nicer.

IamSmooth

Mon Dec 01 2008, 12:05PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

Everywhere I search I keep coming up with PMW designs for power supplies. Is there any good book for shunt controls using FETs, BJTs and IGBTs?

Can use these devices without a driver circuit? Can I let them naturally osciallate and find an equilibrium for shunting the right amount of power, or do IGBTs *have* to have a mandatory duty cycle within their SOA?

Dr. Dark Current

Mon Dec 01 2008, 01:50PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Basically you use a pulse width modulated signal to drive a FET/IGBT which drives your high power resistor.

The resistor must have small enough resistance so its maximum "shunting power" will never be reached.

You use a SMPS controller chip to generate the PWM signal, in simple words you feed the rail voltage to a resistor divider which controls the comparator inputs in the PWM chip.

Dr. Slack

Mon Dec 01 2008, 02:03PM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Everywhere I search I keep coming up with PMW designs for power supplies.

Yes, that's because the difficult thing to do is to build a very efficient power supply. Switched mode and PWM are the way to go, using devices that switch fast, like FETs. There's a lot about it from manufacturers, as everyone wants to build efficient supplies, and the manufacturers want to sell their whizzy FETs and controllers so help people to use them, it's a win-win.

Is there any good book for shunt controls using FETs, BJTs and IGBTs?

Probably not. Very few people want to waste 100% of their input power. Those that do will be writing about their resistors and their cooiling. Switching the resistors in and out with FETs or relays is (comparatively) a piece of pi$$. There was a very interesting article published about 10 years ago about a hydro power station that had just upgraded their generators, so needed another 500MW (mega, not milli) watt resistor as somewhere to dump the power if the load went offline for the 20 seconds it took to shut the taps. Air-cooled stainless steel stampings stood on 500kV insulators in the open air. But I digress

Can use these devices without a driver circuit?

No, if there's any power ito control with it that is. If you want to use a FET or IGBT in switching mode, then it must a) be sufficiently saturated and b) whip through its linear region in much less time than the SOA graph says it's safe so to do. In order to whip it through its linear region, you must shovel in (or out, both up and down count) a large amount of gate charge being demanded by the Miller capacitance in a few uS, which generally means currents in the ball-park of 1 amp. That needs more than a simple opamp or comparator, and there are plenty of "drivers" around dedicated to just that. Some have extra features like opto inputs, some have bootstrapped output supplies for high side driving, but mostly they are just 0-15v, several amp output logic buffers.

Can I let them naturally osciallate and find an equilibrium for shunting the right amount of power,

eh, yes, I thought that's what I was advocating in my previous post

or do IGBTs *have* to have a mandatory duty cycle within their SOA?

SOA is concerned with heating, and FET/IGBT heating comes from 4 sources, the sum of which must meet the total device dissipiation, while the dynamic losses must also meet the pulse time requirements of the SOA. There are several ways to break it, and you must avoid all of them.

a) off state losses - current zero, so no loss
b) switching on - dominated by the time getting through the "finite volts with finite current" region
c) on state losses - voltage near zero, generally fairly small as long as it is driven well into saturation
d) switching off - see (b) above.

The overall duty cycle will modulate the on state loss
The speed through the transistions will control the energy loss for each switching event and ...
... the switching frequency will determine how many of these loss events occur per second

Therefore the first rule for using FETs/IGBTs in a switching circuit is to switch them, fast and hard, both to meet the dynamic SOA and to minimise the total energy lost in each switching event. At lowish speeds this is most easily done with a dedicated driver IC (at higher (SSTC) speeds, people tend to craft their own drivers). Then keep the switching frequency down, which minimises the total power lost to switching. If you figure the on state loss with 100% duty cycle, that's easy to do, and gives you a worst figure that will not be exceeded for that contribution.

IamSmooth

Mon Dec 01 2008, 02:51PM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

I ordered a few FETs and IGBTs for experimenting. I don't want to start blowing them.

1. If I use the zener setup as in a previous post will this work? Wasting 100% power is what I want to do; frying an IGBT is not the goal.

2. If #1 will not work, my problem is still generating a stable voltage off of a variable source of 0-500v in order to power any IC chips.

Dr. Slack

Tue Dec 02 2008, 08:27AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

The simplest way of getting a low voltage supply is a shunt regulator, if the output current is low enough. If you can design everything to run from (say) 2mA, and allocate 1mA to the zener for regulation, then that's 500v * 3mA = 1.5 watts in the series dropper resistor. That's quite managable.

At low wind speed, there is a danger that the supply would go out of regulation low. To counter this problem, make sure the controller does not switch the FET on under any low rail voltage conditions.

Can the controller be designed to use <2mA? The MAX5054 FET driver that we've just started using at work takes 50uA quiescent current, and an additional 10uA dynamic current at 1kHz, and will deliver amps. Remember that the peak current to charge the FET gate comes from the 15v rail capacitor, and it stops flowing as soon as the gate is charged.

The 5054 comes in CMOS and TTL input flavours. The great advantage of Maxim is that they fling samples at you, rather than you having to plead.

The mean charging current is given by (gate_charge * switching frequency). For the IR 35n50 I looked up, Qc(max) was 230nC at 400v 34A, so switching at 1kHz would give a mean gate charge current required of 0.23mA. YMMV, but it would have to vary quite a lot for the current to exceed 1mA, and a further reduction in switching frequency would bring it back down again. The 500v rail capacitor (not shown) will have a significant effect on the switching frequency.

Now you need a low current comparator. It doesn't need to be hyper-fast, so there should be several low current ones available. Most of the very low current ones I spotted initially are 5v only, which would be OK with the TTL input 5054, and now you know how to make a very low current 5v supply from 15v! I was about to plough through data sheets on comparators, but then thought, hey, I'm doing your planz for you, I don't want to deprive you of all the design work. I've drawn it as a schmidt, to indicate the hysteresis required, and left the reference voltage implicit. Some comparators include a reference! The capacitor on the comparator input is to reduce the peak to peak value of the expected noise below the hysteresis range of the comparator, to prevent the FET "chattering". The switching delay introduced by this time constant will reduce the switching frequency, and increase the 500v rail ripple in regulation over that obtained from static calculation.

Low rail safety - The 5054 works correctly above 4v, below 4v it has an undervoltage lockout (UVLO) for which it forces the FET gate low. If the comparator is also guarranteed good above 4v, then job done. Otherwise, the 5054 has two gated inputs, so one can come from the generator rail comparator, the other can come a low rail comparator. This you build from a single NPN transistor so you know it's going to work by inspection.

BTW, there's one deliberate mistake in the diagram which needs to be corrected before it will work as intended, the first person to spot it gets a virtual coconut.

IamSmooth

Sat Dec 13 2008, 06:17AM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

I need some help troubleshooting this shunt. I have 8 mosfets rated for 500W (600v/30A) in parallel. The load is 25 ohms. I have a 56v zener and 4.3k resistor in series coming off the rail going to a 16v zener. There is a 4.3k resistor parallel with this one. This 16v zener is connected to the gates of the FETS. This is set up just like the schematic you had shown earlier. I have 8 ohm resistors connected from the Sink going to the ground.

WHen I first tried it it would conduct current when I got above the a gate voltage of 4.5v. I realize that I didn't measure Vgs, but only the gate voltage. As I increased the voltage, the voltage going to the gate would go up and the current would go up. When I had the rail at 100v the gate was close to 15v. Then, at some point, I noticed the current would bounce from low values to the expected higher value; Vg would bounce between 4.5v and 8v. As Vg bounced, the current would go up and down; sometimes staying high, and then sometimes going low.

What is happening?

EDIT:

I measured Vgs. My digital voltmeter couldn't seem to lock on a voltage. It would bounce all over the place.
ANy help would be appreciated. Thanks

IamSmooth

Sun Dec 14 2008, 03:47AM

Registered Member #190 Joined: Fri Feb 17 2006, 12:00AM
Location:
Posts: 1567

Sorry for the double post, but I wanted to add an image of the circuit.

I added a 10 ohm resistor in series with the gate. I also swapped the 8 ohm resistors on the Source to 5 ohm resistors. The 10 ohm resistor seems to have stabilized things, but I don't know why. Anyone that knows why is more than welcome to enlighten me.

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