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4hv.org :: Forums :: General Science and Electronics
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Bridge vs. Push-Pull

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Dr. Dark Current
Sun Oct 05 2008, 01:39PM Print
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Is there any disadvantage of using shematic (2) over (1) assuming the same transistors are used?
The big advantage of the push-pull topology is that no isolated base/gate drive is needed, but are there any drawbacks?


1223213910 152 FT0 Bridgevspushpull


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aonomus
Sun Oct 05 2008, 05:08PM
aonomus Registered Member #1497 Joined: Thu May 22 2008, 05:24AM
Location: Toronto, Ontario, Canada
Posts: 801
Perhaps with scheme 2 you require twice the windings to get the same output voltage no? You are pushing electrons through half the total winding in each direction right?
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Steve Conner
Sun Oct 05 2008, 06:22PM
Steve Conner Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
The main drawback is that the push-pull always has less than unity coupling between the winding halves, even with bifilar winding. This wastes 0.5*L*I^2 of energy at each switching instant, where L is the leakage inductance. Snubbers or avalanche rated devices are needed to soak the energy up.

It's also vulnerable to saturation from asymmetrical gate drive, whereas (1) can't saturate because the capacitors block DC.
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Dr. Dark Current
Sun Oct 05 2008, 07:13PM
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Steve McConner wrote ...

The main drawback is that the push-pull always has less than unity coupling between the winding halves, even with bifilar winding. This wastes 0.5*L*I^2 of energy at each switching instant, where L is the leakage inductance. Snubbers or avalanche rated devices are needed to soak the energy up.
OK, thanks, do you think the dissipation in switching devices from avalanching will be noticably higher in the push-pull drive, with "normally" (not bifilar) wound primary? I have absolutely no idea how to estimate the Lleak, this will be driving a fairly large ferrite transformer with big FETs and few tens of kHz frequency.


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GeordieBoy
Sun Oct 05 2008, 08:15PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
Topology 1 is usually used when the DC bus voltage is relatively high (and therefore the currents are quite small for a given power rating.) This means that the capacitors in your schematic can be quite small for a given deviation of the mid-point voltage of the capacitive divider. (Note: It is not normally done quite like you drew, but a single high-current rated PP cap is used in series with the transformer winding to block DC. This can optionally be tied to the mid-point of two series connected electrolytics if a voltage doubler is also employed. Eg. PC SMPSU.)

Topology 2 is more common in low-voltage high current applications. For example a 12V to 240V 50Hz "inverter" to allow home appliances to be run of an automotive battery will often use topology 2. Low voltage high-current DC-DC converters are another example. The reason is that the peak currents can be in the tens or hundreds of amps to get sufficient power when the input voltage is only a few volts. DC blocking capacitors capable of supporting these currents without overheating would be expensive, bulky and heavy.

As Steve C said topology 2 requires devices with twice the DC bus rating plus the voltage spike from the leakage inductance plus the safety margin. However this is not typically a big problem if the input voltage is only 12V or so. Dissipative RC snubbers or an RCD clamp are normally employed to keep the peak turn-off voltage somewhere inside the device rating. (Topology 1 doesn't need this over-voltage clamp because the spike due to the leakage inductance of the transformer is clamped to the supply rails by the switch's free-wheel diodes.) You did mean to draw free-wheel diodes across the switches in Topology 1 didn't you!!??? smile

As a side note, topology 2 doesn't give as good a winding utilisation in the transformer because only half of the primary winding supports power transfer at any one time.

I hope this helps,

-Richie,
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Dr. Dark Current
Sun Oct 05 2008, 08:32PM
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
GeordieBoy wrote ...

As Steve C said topology 2 requires devices with twice the DC bus rating plus the voltage spike from the leakage inductance plus the safety margin. However this is not typically a big problem if the input voltage is only 12V or so. Dissipative RC snubbers or an RCD clamp are normally employed to keep the peak turn-off voltage somewhere inside the device rating. (Topology 1 doesn't need this over-voltage clamp because the spike due to the leakage inductance of the transformer is clamped to the supply rails by the switch's free-wheel diodes.) You did mean to draw free-wheel diodes across the switches in Topology 1 didn't you!!??? smile

As a side note, topology 2 doesn't give as good a winding utilisation in the transformer because only half of the primary winding supports power transfer at any one time.
Thanks for the reply Richie.
Yes there should be clamping diodes on both schematics.
The thing is I have 800V FETs with big gate capacitance so I thought it would be more convenient to run them with rectified mains voltage (330VDC) and use push-pull, instead of using a doubler and isolated gate drive which would probably need to be done with opto-couplers.

I'd want to use the devices' avalanche capability to clamp the spikes.
SO the question is still the same, will the losses be noticably higher when using push pull topology compared to half-bridge powered from a doubler?

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GeordieBoy
Sun Oct 05 2008, 08:46PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
It all depends on the power rating, and anticipated leakage inductance of the transformer. I can't give you any idea of actual losses in a particular arrangement without knowing things like peak and average current, duty cycle, expected wave-shapes, choice of switching devices, etc...

800V MOSFETs do sound marginal for a 330VDC bus in push-pull arrangement. You need to do some calculations on the snubber losses to work out if they are realistic when the switch voltages are kept within the rating.

As a guide, I wouldn't recommend using 800V MOSFETs in a flyback supply running from 330VDC if the power level is more than about 80 Watts. Above this figure the snubber losses start to become un-manageably high and the cost of a second silicon switch (and drive electronics) becomes the cheaper option.

If you are looking to run more than this power I would go with a conventional half-bridge up to a kilowatt or so, and then a full-bridge above that.

As I said, push-pull is best suited for input voltages in the tens of volts where a comparatively large back EMF from the leakage inductance is still manageable.

-Richie,
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Dr. Dark Current
Tue Oct 07 2008, 02:11PM
Dr. Dark Current Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Today I tried the push-pull but failed badly. The current waveform is highly asymmetrical, it appears one FET mostly switches forward current while the other one mostly reverse (diode) current, even though the gate drive waveform is produced with a SMPS ic which has flip-flop divider in it. It also comsumes fair amount of power (>10W).
The transformer has only primary winding made in two layers, nothing else.
So it seems half-bridge is the only way to go...

The current in the scope shot is through the center-tap, as you can see the waveform is highly asymmetrical and there is a lot of ringing.

1223388567 152 FT55120 Tranny

1223388567 152 FT55120 Current

1223388667 152 FT55120 Mosfet
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Sulaiman
Tue Oct 07 2008, 06:16PM
Sulaiman Registered Member #162 Joined: Mon Feb 13 2006, 10:25AM
Location: United Kingdom
Posts: 3140
To me there are two major differences;

1) If the drive circuitry turns on one transistor for too much time,
the push-pull will die due to dc current which can't happen in a half-bridge.

2) If the drive is not EXACTLY equal for both transistors in the push-pull design,
each cycle the dc imbalance between the windings will increase a little until the core saturates .. bye bye transistor!

So half-bridge is much safer - at the cost of a high-side driver.
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Petezel
Sat Nov 08 2008, 02:27PM
Petezel Registered Member #211 Joined: Sun Feb 19 2006, 05:33PM
Location:
Posts: 27
Dr. Kilovolt wrote ...

The transformer has only primary winding made in two layers, nothing else.
So it seems half-bridge is the only way to go...
The current in the scope shot is through the center-tap, as you can see the waveform is highly asymmetrical and there is a lot of ringing.

1223388567 152 FT55120 Tranny

1223388567 152 FT55120 Current

1223388667 152 FT55120 Mosfet

Wait a minute.. Two layers? is that one layer for each half of the whole primary? the reason I ask, is that if one layer is closer to the core, it will couple more strongly, moreover, the winding on the top will need more wire to cover the new area over the top of first, so its resistance will be greater. If it's imbalances you seek, I think that is where they stem from, and perhaps it is the transformer that needs attention, rather than the driving electronics.

As for typologies, elegance comes in 2 forms, one is a simple does-the-job type, the other is a slightly more complicated, rugged and hard-to-kill beast. 'Best' is a translation of your needs. I hope this helps you out.
Pete
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