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Registered Member #1024
Joined: Sun Sept 23 2007, 10:56AM
Location: Northern NSW, Australia
Posts: 95
Just testing the new driver and have hooked up the GDT to do the phasing. The GDT is driven by a normal H-bridge , as per Steves new driver, capacitively coupled with 50uF electro and 470nF film caps. The output looks ok :
And judging from the low current draw with no load, cross conduction in the bridge is under controll. But , over the duration of one burst the voltage swing droops down from +/- 2x the rail voltage to +/- 1x the rail volatge, ie it starts at 36v p-p , but droops to 18v p-p :
I'm a little hung over , and the brains not with me today, but I dont get it. I've not noticed this on my past drivers, but maybee I just havn't noticed! Does this look normal to anyone ? Whats going on ? Whats my name ? Where am I?
================== UPDATE =====================
Ok, turns out the SUPPLY RAIL is actually drooping, traces below are : -top : supply rail -bottom : gate voltage from random bridge fet
Wierd , seems the three terminal voltage regulator is just not supplying the required current ( <300mA ! ) , it is however happily regulating the voltage under no load conditions.
Registered Member #1024
Joined: Sun Sept 23 2007, 10:56AM
Location: Northern NSW, Australia
Posts: 95
, Indeed!
But seriously, there is loads of filter caps on the rails and drivers. I've looked a bit closer , and it appears I do have a cross conduction problem in the bridge. I'm going to try lowering the bridge gate drive voltage and see if that helps, failing that I'll start cutting gate tracks and inserting zeners and resistors and other mumbo-jumbo on the bottom halves (N-ch) of the bridge.
Teach me for not using matching P and N-CH devices in the bridge! I'm using what I had lying around ( IRF9Z24NS and RF1S25N06 ) there close-ish but certainly not 'matched'. Fun and games !
===== UPDATE =====
Well , dropping the bridge gate drive voltage to 8v (as per Steves new design) did the trick:
Eevrything running cool now , no droop . I should have listened to Steves notes in the first place!
Registered Member #146
Joined: Sun Feb 12 2006, 04:21AM
Location: Austin Tx
Posts: 1055
Ive had this P/N driver work OK with fairly different P and N fets. I found that the drive voltage for them was fairly sensitive, and that lower drive voltage (lower than the 9V i suggest) can sometimes help avoid cross-conduction even better. I wouldnt go less than 5V for that gate drive.
For what its worth, i dont really see any drooping with multi-mS long pulses in the 100's of khz range on the gate drive supply when using the mosfets i have spec'd out, and im only using 660uF total filter cap (330u before and 330u after the regulator).
Registered Member #1024
Joined: Sun Sept 23 2007, 10:56AM
Location: Northern NSW, Australia
Posts: 95
Well , I loaded it up today with the final output bridge :):
And the waveforms are now all bad again :( , all the following are waveforms at the input side of the GDT.
First, no load (final output bridge not connected), very nice:
Then with load, not very nice :
Then referenced to ground this is from the side of the gdt driving bridge with no dc blocking caps:
And this abomination is from the side of the GDT with the blocking caps:
So, I have tried upping the DC blocking capacitance to 50uF , no change, I have replaced all fets in the GDT driving bridge, no change. There is no droop on the supply rails. This waveform looks like what I was getting when my driver was ending the burst with one driver high and one low, but that is not the case here, this driver ends the burst with both N-ch fets in the bridge ON, and the P-ch off.
Does this look familiar to anyone else ?
========== UPDATE ===========
How very embarasing, just had another look, and I have stuffed up my PCB layout, I'm driving both P-ch fets in the bridge from the same driver! DOUP!
Its tempting to clear this post! But I will leave it here for reference if anyone else make the same stuffup
Registered Member #146
Joined: Sun Feb 12 2006, 04:21AM
Location: Austin Tx
Posts: 1055
Hah, way to go! :P
I just wanted to mention that if you feed the input with a signal generator (or some other non-synchronous signal) then there can often be a small ripple in the gate envelope due to the mismatch in cycle length of the first half-cycle and the rest. It will basically look like your gate drive wave form is waving up and down at a lower frequency. Typically this will completely disappear when using feedback as normal. I also notice that at really low input voltages (and hence, low primary currents) i can get the thing to oscillate, but the first few cycles of RF are botched up, so it causes the gate waveforms to jump around a bit. Again, this should go away at 15% or less of the intended operating voltage of the inverter. If bad waveforms do persist up to higher voltages, check that your feedback signal looks good at the diode clamp circuit and at the input to the hex-buffer chip.
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