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"Pulse processing" logic

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Dr. Dark Current

Sun Feb 24 2008, 07:18PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

I'm trying to design a logic that would work like illustrated in this picture:

The repuirement is that it should be pretty fast (<200ns). I have thought about this quite hard but I think I've simply not played with enough logic circuits.

Any ideas from you experienced with logic circuits/signal processing?

(In case you are wondering, yes this will be a controller for a self-tuning SLR converter (hopefully)).

ShawnLG

Sun Feb 24 2008, 07:29PM

Registered Member #286 Joined: Mon Mar 06 2006, 04:52AM
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Posts: 399

You could simply run the signal through a D-flipflop divider. If the rising and falling edges are critical than that would be a problem.

Dr. Dark Current

Sun Feb 24 2008, 08:59PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

It must work exactly like in the picture because the second edge of the "little pulse" is dependent on the output changing on the first edge (it's a feedback system).
I believe this would be pretty easy with a microcontroller but I've never worked with them.

teravolt

Sun Feb 24 2008, 09:04PM

Registered Member #195 Joined: Fri Feb 17 2006, 08:27PM
Location: Berkeley, ca.
Posts: 1111

what is the duration of the little pulse and the cycle time

Dr. Dark Current

Sun Feb 24 2008, 09:21PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

teravolt wrote ...

what is the duration of the little pulse and the cycle time

This depends and the frequency is not constant in operation, but the duration of the little pulse should ~1-5% of the total period (actually dependent on delay in the feedback path) and the output squarewave would be ~20-50kHz.

Dr. Slack

Tue Feb 26 2008, 08:16AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
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Is the input waveform always of the same form, pulse - transition - pulse - transition - etc?
If the circuit makes an output transition on something other than the leading edge of the pulse, does the driven circuit resynchronise, or explode?

The problem with detecting and acting on the leading edge of a pulse is that the circuit does not know whether it is a complete pulse or a lone transition until the back edge comes along later. That is too late, unless you can design the fabled "edge anticipator circuit". Therefore to know whether it is the correct edge, you need to make some assumptions from past events.

One solution would be to detect all the edges, then toggle on every third one. However that would require the driven circuit to sync itself, and be safe while it wasn't synced. It would also be susceptible to glitches.

Another solution would be to trigger a monostable on each edge, and detect a transition occuring in the time while it was set. That would identify the back edge of each pulse. Then you can toggle the output on the next edge of the same polarity. This may also detect glitches as valid pulses and so get upset.

Usually with these questions, it's dead easy to find solutions which will work with clean waveforms. However the first time you try them out, you discover that actually the input is not as clean as you thought and contains extra edges in the form of glitches, or that it gets into a funny state on power-on, or gets into a funny state if the frequency rises above or drops below what you anticipated

Is your input clean?

GeordieBoy

Tue Feb 26 2008, 10:28AM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
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Looking at the digital waveforms, I suspect this is intended for some sort of SLR inverter? You can use fixed frequency drive from a standard PWM controller - That is how it has always been done, you don't need feedback. Only requirement is to stop charging when the desired output voltage is reached.

Even with soft-switching in SLR inverter you'll find switching spikes and ringing in the power circuit give you loads of edges where you didn't expect them anyway, so fixed f / fixed D is the way to go. See Finn's thread and Marko D's documentation on this subject.

Finally, if you really are set on using feedback to control the IGBTs, get into the way of thinking about them as SCRs. Once you turn on an IGBT, it must stay on until the current through it tries to reverse and transfers to the free-wheel diode. At this point you can turn off the IGBT. When the current through the diode falls to zero, you can then turn on the opposing IGBT to run the whole cycle in reverse. I'm sure you could dream up some arrangement of CT's and logic to implement automatic control this way, but all of these timings are more-or-less fixed at the time of design so it shouldn't need complicated control.

Dr. Dark Current

Tue Feb 26 2008, 11:04AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

GeordieBoy wrote ...

Looking at the digital waveforms, I suspect this is intended for some sort of SLR inverter? You can use fixed frequency drive from a standard PWM controller - That is how it has always been done, you don't need feedback. Only requirement is to stop charging when the desired output voltage is reached.

Yes, I actually stated this in my first post, it is for a SLR inverter. The idea of the feedback was to keep ZCS even with open load (if the transformer doesn't like it, help it a little with a gap in the core). Obviously this cannot be done with fixed frequency.

Does exist something like pulse counter which would count both falling and rising edges? Then simply switch the output for every 3rd signal from this "pulse counter".

GeordieBoy

Tue Feb 26 2008, 12:03PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
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The idea of the feedback was to keep ZCS even with open load.

The SLR inverter acts like a constant current power supply so you don't want to run it into an open load. You will always loose Zero-Current turn-off of the IGBTs with the output of the transformer open-circuited because there is no path for the series-resonant current to flow. (Unwanted parallel resonance between the transformer magnetising inductance and inter-winding capacitance actually dominates here, instead of wanted series-resonance between leakage inductance and Cp - This is bad.) You would normally design the converter to maintain Zero-current turn-off of the switches up to a certain output voltage at which point charging is then disabled. Above this point the conduction angle of the output diodes would become so small that the current waveforms distort and you cannot find a suitable instant to turn off with zero current.

The best thing to do is to build the SLR inverter with manually adjustable frequency and pulse-width pots and explore how it behaves under different loading conditions. You will learn more about what you are dealing with, and then be in a better position to decide if you think you can come up with a better control scheme than the industry currently uses.

I hope this helps,

-Richie,

teravolt

Wed Feb 27 2008, 04:55AM

Registered Member #195 Joined: Fri Feb 17 2006, 08:27PM
Location: Berkeley, ca.
Posts: 1111

i am not fimiliar with a slr convrter but to bad there is not a way to sync the small pulse then picking the edge would not be a problem

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