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Goldilocks Gate Drive?

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Dr. Dark Current

Sun Mar 09 2008, 02:51PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Kim, is this the schematic you use? (replace the IR2153 for whatever you use)

I got some 60A IGBTs so I want to make sure I use the right circuit before I hook them up.

Marko

Sun Mar 09 2008, 03:10PM

Registered Member #89 Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145

Kim;

kim_ladha wrote ...

Hi Marko,

To clarify. IGBTs have a pnpn internal structure like a thyristor. If the transistor avalanches then it remains 'latched' until the current is reduced to zero. IGBTs can also avalanche like a bjt this is leads to latch up. A bjt avalanches when you apply too much voltage and is characterises by the device suddenly switching on like a thyristor. You can help prevent this by tying the gate to the emmitter using a resistor or by using a lower impedance gate drive in the case of igbt's. The best way to stop transients latching the igbts is using a MOV or TVS diode.

When you overvoltage a MOSFET the electrons just squeeze through the channel- this looks like a zener diode characteristic although it is not really. If you apply a pulse of voltage to the drain, some charge gets to the gate through Cdg (drain gate capacitance or miller capacitance). This turns on the device until the charge is removed. If you have a low impedance driver, this charge is removed quicker and the dv/dt turn on is avoided. You can't latch a mosfet but you can get it to turn on by itself with enough dv/dt.

Regards
Karim

Aww, wanted to reply to this one but just forgot, should have visited forum more last weeks but school busted me.

really, what is ''avalanching''?

What you are describing looks like what I knew as latch-up, the activation of the parasitic thyristor in an IGBT, which is a pretty well eliminated problem today. I was pretty sure nothing like that can happen in a BJT.

Also, I was taught that latch up happens due to overcurrent, and not the overvoltage.

What I called ''avalanching'' was, as you say, device dimply acts like a zener once it's breakdown voltage is exceeded.

I had a pretty strong conclusion that this is same for mosfets, IGBT's, bjt's and diodes.

I think some people here experimented with avalanching of IGBT's - again from all I understood they simply acted like zeners again and heated up, no any kind of latch-up effect.

And how can BJT's ever latch up?

Two years or so I've been taught so and now you come with something completely opposite!
Really I'd like you explain yourself

Jan: to me it appears OK.

Have you considered using an isolated power supply and low side drivers, and a little pulse transformer for signal isolation? It may come handy with larger IGBT's.

Marko

Dr. Dark Current

Sun Mar 09 2008, 03:24PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Marko wrote ...

Jan: to me it appears OK.

Have you considered using an isolated power supply and low side drivers, and a little pulse transformer for signal isolation? It may come handy with larger IGBT's.

Marko

I'm designing a multipurpose halfbridge and I want it to work from ~40Hz or so, too low for ferrite transformer.

EDIT, an important one (at least for me):
I set up a test for IR2111 and IR2153. The test involved applying a negative voltage between GND and floating supply return (floating supply was below low side supply). This illustrates the situation of lower drain/collector voltage swinging below ground.
Results: At approx. -5V, the floating output stopped. Now comes the weird part: Most of the time it "stopped" with 0V on the output, but sometimes there was full supply voltage on the output!! This means both transistors turning on simultaneously leading to instant death/explosion.

Finn Hammer

Sun May 11 2008, 05:38PM

Registered Member #205 Joined: Sat Feb 18 2006, 11:59AM
Location: SkÃ¸rping, Denmark
Posts: 741

All,

We talked about gate drive today and got an idea we thought we`d toss out for comment.

This idea is particularly aimed at driving bricks.

A very fast gate drive is bad, because it creates a big but short (200nS) current spike in the buss, a shoot trough condition, while the anti parallel diode of the other IGBT is forced into reverse recovery.

To avoid this spike, or at least make it smaller, the gate drive is slowed down with a resistor, so that the IGBT turns on slowly, and thus doesn`t conduct fully, while the diode recovers.

This leads to higher heating in the IGBT, because it spends more time in the linear region.

What we have in mind can be built in different ways, but in theory does this:

At the start of the gate charging cycle, the charge passes the gate resistor, to slow the turn on, but only untill the anti parallel diode has recovered. When this has happened, we`d really like full gate voltage quick, to reduce heating, so a fet placed in parallel with the gate resistor is gated, to allow full gate drive current from that point on.

A 555 could time the delay, and it should be really simple.

Comments?

Cheers, Finn Hammer

GeordieBoy

Sun May 11 2008, 06:00PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

I have never heard of this being done in commercial designs but I guess it may have a small efficiency advantage if you can get it right. The main problem that I see is that the reverse recovery time and peak reverse current of the power diodes will heavily depend on junction temperature. The IGBT transfer characteristic will also change as the IGBTs warm up, so it might be hard to keep the gate-emitter voltage profile continuously optimised as devices heat up, and for varying load conditions.

Since the load current in the SLR inverter is sinusoidal, you shouldn't really need to have a gate-drive signal that rises too rapidly anyway. You only need to supply sufficient gate-emitter voltage to support the instantaneous collector current at each point in time as it rises away from zero. Anything faster just exacerbates diode recovery problems by sweeping out stored charge faster, with a sharp current spike. (Such a current spike is usually followed by ringing of the stray inductance in the DC bus and clamp wiring.)

With suitably fast free-wheel diodes and a low enough resonant frequency you should be able to find a turn-on profile that reduces any reverse-recovery spike to an acceptable value without de-saturating the IGBTs on the rising load current slope.

I'm sure you already know this, but the IGBT turn-on sequence is comprised of things like delay-time, current rise time, voltage fall time etc. If you try to optimise the gate-emitter profile you need to make sure you are altering the rate of change in the right region of the turn-on sequence. Typically the gate-emitter voltage will naturally rise quickly at the start, then plateau during turn-on due to the miller effect when the collector-emitter voltage is actually falling.

-Richie,

Marko

Sun May 11 2008, 06:28PM

Registered Member #89 Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145

That is a huge field Finn, and answer heavily depends on your exact application as I think.

If you have a bridge of devices with gate drive applied, driving a purely resistive load (which will actually be lightly capacitive due to device's output capacitances), exactly what you wrote happens.

Freewheeling diodes end their conduction by getting full supply voltage slammed across them resulting in high recovery losses.

The second major source of losses in this case is the output capacitance itself, which dissipates energy each time the device turns on.

I think this is much more pronounced with IGBT's due to their relatively fast freewheeling diodes.

How much can one help this with gate drive, I don't know.
Even if you could do something about diode recovery losses, output capacitance losses will still persist no matter what you do.

The *proper* way of avoiding these losses is to make the load current lag, by using some kind of commutating inductance. (which may be discrete or magnetizing inductance of some transformer).

Lagging current will discharge the device output capacitances prior to turn-on, inducing ZVS operation, and enabling the diodes to recover softly as their conduction is terminated by current changing direction (the adjacent device turning on).

This is how we all actually manage to get the IRFP460's work into hundreds of kHz efficiently.

You can set up an experiment:

Drive a bridge of IRFP460's without heatsinks with SG3525 at 300-400kHz, and put a light bulb at the output.

You will notice the transistors getting extremely hot quickly, both due to lack of ZVS and diode recovery losses.
Then add a 100uH inductor in parallel with the bulb - you should see a dramatic improvement.

At this point you could play with gate drive and compare results. Something is telling me that you won't really see as much improvement, but I haven't tried. Mosfets are better platform for that because of their comparatively slow diodes.

IGBT's though have their problem, that they are quite slow and if you add commutating inductance they need to hard switch it.

I've often read various articles advising against use of ZVS on IGBT's, apparently for this reason.

It seems that, with IGBT's, it is actually better to live with diode recovery and output capacitance losses than trying to remove them with additional inductive current.

In things like SLR inverters, these losses may after all be so dwarfed by just conduction losses that they could be ignored.

I'm not completely sure if that's just it, anyone is free to fill me up.

PS. Richie: I'm confused - would it actually, for an SLR inverter, make any sense to put a parallel commutating inductor at the output of the bridge?

the resonant network of SLR inverter always looks like resistive load equal to it's characteristic Z, so I'm wondering if some inductive current may be of help in that case.

Marko

GeordieBoy

Mon May 12 2008, 10:15AM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

In general ZVS is best for high-voltage MOSFETs because MOSFETs can switch large currents very quickly with no current tailing, ...but they have a relatively large Cds that would otherwise cause significant turn-on losses.

In contrast, ZCS is generally better for IGBTs to reduce current tailing. An IGBT with the same current rating than a MOSFET may be 2 die sizes smaller so Cce and capacitive turn-on losses are less of an issue. The fast co-pack diodes with IGBTs are also better suited to forced reverse recovery than the crappy body-drain diode that is a by-product of the MOSFET production process.

I would not use a parallel commutating inductor across the bridge in an SLR inverter because any parallel resonance is undesirable. The ramp of its magnetising current would also mess up the zero-current switching that makes the SLR bridge of IGBTs work efficiently.

-Richie,

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