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Registered Member #30656
Joined: Tue Jul 30 2013, 02:40AM
Location: UK
Posts: 208
should be lots of analogue switches designed specifically for SATA, also a lot for other high speed PC interfaces such as PCIe, USB3 etc. Assuming that the signalling you're using is in the same voltage range should be easy!
Registered Member #65
Joined: Thu Feb 09 2006, 06:43AM
Location:
Posts: 1155
You could look at the DS125BR820 with the LVDS i/o...
A word of caution about using multiple FPGAs, as the way most clock multipliers work will often require a special sync'ing signal loop through both chips. Note that a PLL clock multiplier still only really guarantees sync at the base clock input Hz, and the actual transitions per second is not always linearly distributed even if they share the same clock source input. Thus, there are several constraints this will introduce to your design, and essentially will make coordination very difficult to mix chip models that significantly differ or don't support the sync'd clock loop.
Also, multi-master LVDS prefers matched impedance lines, and may require your design correct for the cable characteristics. You may find a larger FPGA will be the easier solution.
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SATA comunnication MASER/SLAVE crosover chip
