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Phase Lead Compensator - What to compensate?

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zzz_julian_zzz

Fri Apr 04 2014, 06:12AM

Registered Member #3964 Joined: Thu Jun 23 2011, 03:23AM
Location: Valenzuela City
Posts: 332

Hi everyone,

Just a quick question, I'm wondering, what Specifically are we trying to compensate when we use Phase Lead Compensator? Base on the other notes I have read, we are using these to advance the signal for the bridge not be in hard switching. To advance means to compensate the delay of the Logic Drivers & IGBT switching times.

Now, question; Are the Phase shift times are base on the Rise time, On-time delay, Fall time, and off-time delay from the data sheet of EVERY component (in the case of UD2.0: from the comparator TL3116 to the IGBT to be used) that is/may cause delay on the signal path?
how do we actually put this properly, are we going to sum them up(numbers from the datasheet) then adjust the L using O-scope to see the amount of time being shifted, OR is there a way to actually match the Primary current without these numbers?

how do we check it to make sure it's not too much lead shift/ or not yet sufficient lead shift? I heard that it's more dangerous for the bridge if the signal is too much leading. Thanks.

Kizmo

Fri Apr 04 2014, 08:36AM

Registered Member #599 Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624

Yeps the total sum of phase lead required is a sum of all delays in your circuit. Also transformers, both feedback and gate drive may cause some phase shifting.

Simplest way of adjusting it is just to tweak it for lowest ringing at the inverter output voltage. Due to imperfections of this basic circuit you can't get rid of ringing during first couple cycles but that doesn't really matter anyways.

zzz_julian_zzz

Fri Apr 04 2014, 10:50AM

Registered Member #3964 Joined: Thu Jun 23 2011, 03:23AM
Location: Valenzuela City
Posts: 332

Kizmo wrote ...

Simplest way of adjusting it is just to tweak it for lowest ringing at the inverter output voltage. Due to imperfections of this basic circuit you can't get rid of ringing during first couple cycles but that doesn't really matter anyways.

Thank you for the reply.
The output of the inverter means, the two points between the 2 IGBTs of per Halfbridge Leg? This is before the L & C of the primary tank right? Thanks

HV Enthusiast

Sat Apr 05 2014, 01:17AM

Registered Member #15 Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068

Kizmo wrote ...

Yeps the total sum of phase lead required is a sum of all delays in your circuit. Also transformers, both feedback and gate drive may cause some phase shifting.

Simplest way of adjusting it is just to tweak it for lowest ringing at the inverter output voltage. Due to imperfections of this basic circuit you can't get rid of ringing during first couple cycles but that doesn't really matter anyways.

Agreed. Lowest ringing and overshoots on the pulse edges. The reason being that even your measurement equipment (current probe, voltage probes) will induce some phase shift into the measurements, so simply lining up the voltage / current waveforms for perfect "zero cross switching" using whats shown on the oscilloscope is not necessarily whats happening with the real waveforms.

I know that I get about a 10 degree phase shift with just my Pearson current transformer alone.

Feathers

Mon Apr 07 2014, 05:57PM

Registered Member #10052 Joined: Thu Feb 07 2013, 11:31PM
Location: Overland Park, Kansas
Posts: 78

Its important to recognize as well that you'll never be able to compensate for the first cycle or so, because the phase-lead circuit is a passive network, and can't see into the future.
In other words, it doesn't "know" the phase/frequency characteristics of the signal its compensating until a cycle or so of that signal has passed.

I spent forever hunting through my driver, and working with sub-optimal phase lead adjustments trying to avoid the inevitable. :P

Goodchild

Fri Apr 11 2014, 06:09PM

Registered Member #2292 Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795

Feathers wrote ...

Its important to recognize as well that you'll never be able to compensate for the first cycle or so, because the phase-lead circuit is a passive network, and can't see into the future.
In other words, it doesn't "know" the phase/frequency characteristics of the signal its compensating until a cycle or so of that signal has passed.

I spent forever hunting through my driver, and working with sub-optimal phase lead adjustments trying to avoid the inevitable. :P

Actually this is not really the case. If you run SPICE you will see that a passive LR will start leading almost instantly. This true because V will always lead the I in an LR network regardless if itâ€™s the first cycle or the last or somewhere in between. Itâ€™s the rate of change of I that creates a lead in V. This holds true for things other than sine waves as well. As long as it has a rate of change associated with it this phenomenon with take place.

With that being said the reason why the first cycle doesnâ€™t lead right in the UD2 is due to the sensitivity of the detector/squaring network after the LR (ie the diode copper and comparator). The voltage drop of the copping diode network must be overcome along with threshold voltage set at the input of the comparator. Typically at the start of a burst the feedback at the zero crossing doesnâ€™t have enough amplitude to cross these thresholds until about 5% to 15% into the quarter cycle.

There is not really any simple ways to eliminate this. One solution would be to lower the comparator reference V for only the first half-cycle then raise it for the remainder of the burst. However this is not necessary considering the losses on the first cycle are super low anyway.

8661228164 B02fa9b33e C

Kizmo

Fri Apr 11 2014, 06:35PM

Registered Member #599 Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624

I think dude 500 explained this issue quite well here:

Goodchild

Fri Apr 11 2014, 06:41PM

Registered Member #2292 Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795

Kizmo wrote ...

I think dude 500 explained this issue quite well here:

Kizmo... You sneaky dog, I see what you did there

My post to that thread is back when I thought of it the way Austin did. Itâ€™s a triky subject that took me a lot of poking at before I got it all strait in my mind.

Dude500 switched to what is known as all all-pass filter which would indeed eliminate the threshold error. His initial mathematical explanation is spot on, this is tru for both the LR and op-amp based all-pass filter.

Kizmo

Fri Apr 11 2014, 06:43PM

Registered Member #599 Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624

We live we learn :)

Math in that thread goes way past the point i can understand.. but from practical point of view, ringing at first couple half cycles doesn't matter at all :)

Goodchild

Fri Apr 11 2014, 06:49PM

Registered Member #2292 Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795

Kizmo wrote ...

We live we learn :)

Math in that thread goes way past the point i can understand.. but from practical point of view, ringing at first couple half cycles doesn't matter at all :)

You are completely correct ringing in the first cycle is not that big of a deal. It comes down to how perfect you want your signal to look.

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