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PLL SSTC with Type 2 phase comparator problems (added some info)

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Dr. Dark Current

Thu Sept 05 2013, 03:31PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Hello,
I have built a rather large, CW-running SSTC. It uses a 4046 with Phase comparator 2, which is always 0Â° in lock, and a feedback from secondary base current (1:30 CT on a high permeability ferrite core). I have built a smaller SSTC previously with this PLL type and it ran well, but I am having some problems with this big one...

When I dial it up, it always locks well, but when I try to draw an arc to ground, it makes just 1 spark and the output disappears. When this happens, the VCO "slams" to its highest programmed frequency and sits there. Only resetting the supply will make it work again.

Has anyone encountered this problem? What you think might help to solve it? I will try modifying the PLL feedback time constant (right now it is 10k and 22n) and maybe also the CT, but as the driver is built on a PCB (I thought it would run well so I made a "final version" without previous testing), I would not want to mess it up.

Thanks, Jan

Edit: I have displayed the signal input (pin 14) versus the VCO output on the scope and replicated the problem. What happens is that the output LEADS the input by at least 30 degrees. Why does the PLL not decrease the frequency then, when the phase is not zero and output leads the input ??

Another edit: I forgot to mention that pins 4 (VCO out) and 3 (comparator IN) are connected together.
The VCO range is around 60-100 kHz and the resonant frequency is around 80-85 kHz.

Sigurthr

Fri Sept 06 2013, 08:07AM

Registered Member #4463 Joined: Wed Apr 18 2012, 08:08AM
Location: MI's Upper Peninsula
Posts: 597

I had a similar issue with mine. I never found the cause but I narrowed the frequency range and that seemed to fix it. Ground strikes would still pull it off resonance but it wouldn't stall out after the ground arc extinguished.

Dr. Dark Current

Fri Sept 06 2013, 08:34AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

It seems to be a glitch in the IC itself. During the "error condition" the phase pulses output indicates that the PLL is not locked, but the comparator output does not do anything to fix it.

I tried another IC manufacturer and it didn't work at all

it got messed up just when I plugged in the secondary base with no voltage on the bridge (probably some voltage induced from the gate drive) and the output was at the highest frequency all the time.

Steve Conner

Fri Sept 06 2013, 09:04AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

With secondary base current feedback, I think it is possible for the phase of the feedback to swing a full 180 degrees under heavy loading. That would make it impossible for a PLL to stay locked.

The Type-2 phase comparator in the 4046 is edge-triggered, so it's a really bad choice for use around a Tesla coil. It could be falsely triggered by switching spikes from the bridge, or HF hash from ground arcs. If it tries to lock to its own switching spikes, it will jump to one end of the VCO range.

The Type-1 works on the average value of the XORed signals, so it naturally rejects spikes. If you add an integrator to the loop, it behaves the same as the Type-2, except for the 90 degree phase difference, which can be dealt with in a number of ways. I once did it by using a capacitor as the feedback CT burden.

GeordieBoy

Fri Sept 06 2013, 09:14AM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

I was also just about to reply, but just noticed Steve's reply pop up that already said most of what I was going to write!

I'd just second that the Type-2 sequential-logic phase detector is incredibly sensitive to any glitches on the signals being fed in.

It basically acts to adjust the VCO until you have the same number of rising edges per second on it's signal and reference inputs. i.e. It tries to get the frequency right first, then it tries to force the rising edges to be in phase.

When you attempt to draw an arc it's likely that the secondary base feedback signal is getting contaminated with all sorts of crap. The type-2 phase comparator will see all of these additional "edges per second" on the feedback signal from the secondary and interpret this as a big increase in frequency compared to the reference. Then it will do what it's been trained to do. Try to increase the VCO frequency until the frequencies match. That is why I think the type-2 detector will have pumped the VCO up to the maximum frequency limit.

As steve said the Type-1 (EXOR) phase detector is a much better choice in this application because it's inherently more immune to noise, and will work well with squared-up input waveforms. Although it is designed to lock with 90 deg phase shift, you can easily introduce an additional 90 degree shift into the secondary base current sensing waveform by terminating it into a capacitance or inductance instead of a current sensing resistor. The two 90 degree phase shifts add up to 180 degrees, so you just invert one of the signals into the phase-comparator to get it to now lock at 0 degrees.

If you insist on trying to use Type-2 phase detector you'll have to get both of the input signals really clean of any spurious edges. Probably using filtering and comparators with hysteresis, but the phase shifts introduced will likely undo much of the perceived benefit of using the type-2 detector anyway.

-Richie,

Dr. Dark Current

Fri Sept 06 2013, 09:14AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Steve, this is a (SR)SSTC, so the bridge should always switch in phase with the secondary base current. I would not be surprised that much if it lost lock during ground strikes, but why does it latch to the highest frequency and sits there after all the arcs have disappeared?

Well, the noise also came to my mind, I will try adding a 100 pf capacitor in parallel to the signal input pin. Anyways the driver is shielded in a grounded metal enclosure, so interference should be suppressed...

Thanks for the replies so far

GeordieBoy

Fri Sept 06 2013, 09:27AM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

When you arc the top of the secondary to ground it's like you are short-circuiting the secondary coil. So other higher-frequency modes of the secondary that you don't normally think about are probably getting excited. For instance the 3/4 wave mode of the secondary will likely be close to the 3rd harmonic of your inverter so will now get pumped up.

If there's significant 3rd harmonic content in the measured secondary base current this will cause many more zero crossing edges to be seen by the phase comparator. Again, the Type-2 phase comparator will interpret these additional edges as a sudden increase in the frequency of the feedback signal and attempt to ramp up the VCO frequency to match it.

-Richie,

Dr. Dark Current

Fri Sept 06 2013, 10:28AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

I also thought about exciting some harmonics, but the measurements confirm that during the fault condition, the base current is lagging the inverter output so it "wants to" tune to a lower frequency.

Here are some scope shots

1. Normal operation, arcing to air, it will work even with the metal cover of the driver removed. The primary current (not shown) is a sine wave with switching transitions near zero current. 10V/div, 2us/div

2. The fault condition - no arcs, output not connected to anything. The gate drive output (almost identical with VCO output) leads the signal input by nearly 90 degrees, primary current (not shown) is a triangle wave. Putting the cover on the driver makes no difference, as well as adding a 33 pf capacitor in parallel to the signal input. There is some switching noise on the signal input, but it is below the CMOS input threshold and might as well be interference the scope picks up. The VCO input voltage is equal to Vcc and the PC output is held in a low impedance high state.

The phase pulses output as well indicates that the PLL is not locked, but the comparator output does nothing, just sits high... I don't know, it looks like a bug in the IC to me

ScotchTapeLord

Fri Sept 06 2013, 03:20PM

Registered Member #1875 Joined: Sun Dec 21 2008, 06:36PM
Location:
Posts: 635

I don't mean to hijack but I have a question and this thread is relevant to my current work. I'm using the type 2 pll comparator for primary feedback for my DRSSTC. After reading this I'm wondering if it's worth pursuing. Is it likely that I will run into similar problems?

Dr. Dark Current

Fri Sept 06 2013, 03:37PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Hi, well it is possible that you will face the same problem.
Most likely it has really something to do with the switching noise from the bridge getting back into the IC, even though it doesn't show up on the scope... Why it messes up only after a ground strike - I don't know, but possibly it has something to do with the phase difference, once the inverter starts leading the signal input (eg. after the feedback is disrupted by a ground strike), the spikes are in different positions which the IC can't deal with.
And I also found it depends on the manufacturer of the IC. Texas instruments does what I described, ONsemi doesn't work at all.

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