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Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Hi, do you think that identical IGBTs in parallel will share the current well even during switching transitions, so the total losses can be equally divided? Use individual gate resistors, or one for all parallel gates? In large bricks, there are more identical junctions in parallel without any resistors. Thanks for your thoughts.
Registered Member #3640
Joined: Sat Jan 22 2011, 12:16PM
Location: Germany close to Heidelberg
Posts: 39
There's a lot of material out there, perhaps search for 'Igbt parallel PDF'.
Given, Drsstc's switch at zero current, that should help. But then currents are typically beyond spec which does the opposite.
Chosing Igbt's with positive temp coefficient should also help.
I could imagine several parallel smalll Igbt's with rules adhered to and closely thermal coupled on one cooling block per leg comes close to using bricks, especially with fast modern Igbt's.
Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Well, I'm most worried about the difference in plateau voltage of the parallel transistors. The one with the lowest plateau voltage starts turning off after all others have turned off and gets most of the turn-off losses...
The reason I'm asking about this is that individual transistors eg. in TO247 packages are a lot cheaper and switch a lot faster than a single brick. And also because I have more of the smaller transistors and wanted to use them in a bigger TC
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
Nowadays we are leaning towards building multiple H-bridges, and forcing current sharing with ballast inductors or matching transformers.
If you can have 4-layer boards made, you could probably make an array of TO247 devices that outperforms a brick. Certainly the kinds of bricks that you can pick up cheaply on the surplus market.
The biggest problem when parallelling IGBTs is stray inductance between the emitters of the individual devices, and the gate driver's emitter connection. The reason is that the full collector current flows through this inductance, and the L*di/dt voltage due to this high current appears in series with the gate drive voltage, so its effect is amplified by the gain of the device. Therefore, a tiny inductance can have a huge effect.
If you can make this inductance very low, and the same for each device, then they'll run happily in parallel. Soft switching also helps by reducing the di/dt term in the L*di/dt equation.
I'd always use an individual gate resistor for each device. They prevent parasitic oscillations, damp ringing in the gate drive buswork, and I think they may work with the Miller effect to "ballast" differences in switching speeds.
Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Good point Steve With only 2 transistors in parallel, connecting the rf bypass cap as well as the gate drive connection right in the middle between the 2 emitters might help.
Registered Member #242
Joined: Thu Feb 23 2006, 11:37PM
Location: Erie PA
Posts: 210
The dice in a big brick are probably better matched too. Same batch of wafers, maybe even screened before hand. When using multiple TO-247 devices, you could get them from different ends of the distribution curve. I have seen some bricks with series resistors for each die. There's 0805 smt resistors around the perimeter. http://imgur.com/7UNKC (This brick would have liked a little more cooling)
Here's one that isn't blown up. http://i.imgur.com/8sOBX.jpg Larger squares are the igbt's, the single wire in the center is the gate. The smaller rectangles are the diodes. Not sure what the diamond shaped component is in the front. It's connected between the gate and emitter. Maybe a TVS?
Registered Member #3414
Joined: Sun Nov 14 2010, 05:05PM
Location: UK
Posts: 4245
• Twist or run on parallel tracks the gate lead and the gate return lead to minimize gate emitter loop inductance. • Ensure that the gate of the IGBT is looking into a stiff (voltage) source with as little impedance as practical. This advice applies equally well to both paralleled and single device designs. • Do not place Zener diodes or Transient Voltage Suppressors directly between gate and emitter. If over voltage protection is required on the gate, place the Zener diodes on the driver side of the gate resistor(s). • Do not place capacitors directly gate to emitter to control switching times, instead increase the gate resistor. The capacitors may cause oscillations and slow down switching, which increases the dynamic unbalance between devices.
Registered Member #154
Joined: Sun Feb 12 2006, 04:28PM
Location: Westmidlands, UK
Posts: 260
Ash Small wrote ...
• Do not place Zener diodes or Transient Voltage Suppressors directly between gate and emitter. If over voltage protection is required on the gate, place the Zener diodes on the driver side of the gate resistor(s).
From:
eh?....don't understand why they printed this statement.
Registered Member #3414
Joined: Sun Nov 14 2010, 05:05PM
Location: UK
Posts: 4245
Bennem wrote ...
Ash Small wrote ...
• Do not place Zener diodes or Transient Voltage Suppressors directly between gate and emitter. If over voltage protection is required on the gate, place the Zener diodes on the driver side of the gate resistor(s).
From:
eh?....don't understand why they printed this statement.
It puzzled me too. The only reason I can think of, and I've had a drink or three, is that the resistors will run cooler (resistance increases with temperature) but maybe someone else can come up with another reason?
Registered Member #599
Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624
I think its because these TVS diodes and Zeners do clamp rather hard and it may lead into high frequency oscillations if there is nothing to eat the energy.
Actually i have seen quite a few commercial applications where gate protection is placed before final gate resistor :)
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