Comment on my H - bridge design please / Tesla Coils / Forums

Forums

4hv.org :: Forums :: Tesla Coils

« Previous topic | Next topic »

Comment on my H - bridge design please

1 2 3 next

Move Thread

LAN_403

loveHV

Sat Aug 18 2012, 10:25AM

Registered Member #1854 Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88

I've designed my layout of my H bridge to power my DRSSTC.
Should there be any flaws i overseen, or things that could be improved, it would be of great help to me.

The top image is the top layer of the bridge, the two planes you see is the supply voltage and ground. The 2 large pads on the left and right of the board are connections to the copper tubing that connect on the bottom side of the board (second image). On the bottom side run the 2 planes that connect the collector of one IGBT tot the emitter on the top IGBT of each leg on the H bridge.

The smaller pads connect the GDT (lower right corner board top) and the CT's (upper right corner board top) to the board. 2 CT's will be shoven over the copper tubing so those are not visible in these images.

Also not visible:

On the left side of the copper top (1st image) a bus capacitor of 2200ÂµF 400V will be connected to those 2 planes. In parallel with the bus capacitor there will be a 10ÂµF 400V dry capacitor and parallel to that will be 2 TVS's 220V each in series configuration.

Kind regards,
loveHV

Dr. ISOTOP

Sat Aug 18 2012, 09:17PM

Registered Member #2919 Joined: Fri Jun 11 2010, 06:30PM
Location: Cambridge, MA
Posts: 652

The + and - buses should ideally be stacked on top of each other, to reduce parasitic inductance.

loveHV

Sat Aug 18 2012, 10:26PM

Registered Member #1854 Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88

Didn't think of that when i was designing the lay-out XD

How much would it reduce inductance ?

Making the bus planes stacked would require a complete do over, because i would need to relocate most of the components.

But if its critical then i shall apply it :p

Thanks for commenting, I will remember this tip to further reduce bus inductances in future designs. :)

Dr. ISOTOP

Sat Aug 18 2012, 11:11PM

Registered Member #2919 Joined: Fri Jun 11 2010, 06:30PM
Location: Cambridge, MA
Posts: 652

loveHV wrote ...

Didn't think of that when i was designing the lay-out XD

How much would it reduce inductance ?

Making the bus planes stacked would require a complete do over, because i would need to relocate most of the components.

But if its critical then i shall apply it :p

Thanks for commenting, I will remember this tip to further reduce bus inductances in future designs. :)

You'll either need very closely mounted buscaps and a snubber, or a laminated bus, or preferably both. Otherwise, there's a fairly high chance that your IGBT's will die from voltage transients during switching.

Ben Solon

Sun Aug 19 2012, 12:05AM

Registered Member #3900 Joined: Thu May 19 2011, 08:28PM
Location:
Posts: 600

Think of it this way- the amount of space enclosed in the current loop is the incuctance. It's why coax cables have extremely low inductance where a loop is used as an inductor. It may seem like a pain, but it could be the difference of 10v spikes and 200v spikes. And your snubbers will absorb a 10v spike, but 200? Not so much.

loveHV

Sun Aug 19 2012, 12:16AM

Registered Member #1854 Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88

I understand why stacking the bus reduces inductance.

But 100V's of difference in results, between stacked and non stacked seems a bit harsh :p

@ ISOTOP

I can't get my hands on copper clad or copper bus bars.
But the bus cap is gonna be placed as close as possible. And a 10ÂµF MKT in parallel with the buss cap to catch voltage spikes.
Also two 220V TVS's in serie is gonna be placed parallel on the bus to supress transients.

I will try to redesign the bridge layout so that the bus planes are stacked :)

dude_500

Sun Aug 19 2012, 08:49AM

Registered Member #2288 Joined: Wed Aug 12 2009, 10:42PM
Location: Cambridge, MA
Posts: 179

I strongly disagree that it is almost necessary or that it will probably burn out without laminated DC bus. I would guess that easily much more than 99% of DRSSTC's made do not have laminated DC bus, and work just fine!

Of course, that's not to say that it's not ideal.

loveHV

Sun Aug 19 2012, 09:19AM

Registered Member #1854 Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88

Interesting, opinions are divided :p

Well its nice to hear that my DRSSTC will perform with just a normal board.

Im now busy redesigning, but its hard as hell to get the busses stacked and get enough space for the 2 signal planes that connect
to the DRSSTC primary circuit. And all that must happen with just normal TO-247 IGBT's. Where the pins are close to each other.

But the comments so far have really helped me to get my insight in what priors over what in the H - bridge design. :)

Dr. ISOTOP

Sun Aug 19 2012, 09:32AM

Registered Member #2919 Joined: Fri Jun 11 2010, 06:30PM
Location: Cambridge, MA
Posts: 652

Whether or not you need laminated buses depends very much on how fast your transistors are, your drive frequency, and whether or not you use a Predikter circuit.
Without a phase lead, you can estimate ringing like so: when the coil turns off, it has to interrupt Ipk*sin(2pi*t_d,off/T) current, where T is your cycle length. If you're trying to switch in time t_fall, then the induced voltage is L*Ipk*sin(2pi*t*t_d,off/T)/t_fall. Plug in some estimates for L (don't forget your buscap inductance), and you can see how close you are to needing a laminated bus/snubbers/phase lead.

loveHV

Sun Aug 19 2012, 10:17AM

Registered Member #1854 Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88

Well my transistors are IRG4PC50UD so they are kinda fast

The resonant frequency of my secondary coil is about 120 kHz.
So the IGBT's are fast enough.

I'm already planning to use a predictor circuit. This wil minimise the stress on the snubber cap and the semiconductors as the IGBT's will have to hardswitch a minimum of current. Except for the first few cycles, but i will try to minimise this effect when im designing the predictor.

I could do some calculations with the formula you provided dr. isotop. The problem with that is i don't have al the nescessary data.

Sure i can calculate the current its going to interrupt. But i can't get a result from the Ue = L * ( di / dt ). Because i don't know the total L value. I can figure out the ESL of my bus cap. But the rest is kind off hard.

Also the result from that equation wouldn't be correct, because there is still a snubber cap of 10ÂµF present across the bridge.
This one is going to be a 'short circuit' for high frequency pulses.

There are so many variables XD

1 2 3 next

Moderator(s): Chris Russell, Noelle, Alex, Tesladownunder, Dave Marshall, Dave Billington, Bjørn, Steve Conner, Wolfram, Kizmo, Mads Barnkob