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Registered Member #1667
Joined: Sat Aug 30 2008, 09:57PM
Location:
Posts: 374
Hope someone can give me a helping hand with this. I need circuit logic in a program I am currently working on. I want this to be convenient for the user so a solution that just gets the stuff done in some way (e.g. scripting the control logic for 120 inputs that translate into ~400 outputs) won't do.
I've tried to abuse LTSpice, PSpice and Eagle for this job with little success. Net lists notoriously lack the part value and eagle, still producing the most readable netlists does not wish to export schematics as scripts (needless to say they only changed the native schematic format to xml in the new Version 6 that has just reached beta stage).
I would be fine with a unidirectional flow of information my program -> script -> eagle schematic -> net list -> my program
eagle does not allow schematics to be exported as scripts as far as I can tell (or at least not in the free version), so if import generated by ulp scripts is possible, that would be enough.
I've also thought of spice files but my experience in this field is restricted to the last few hours of watching and reading tutorials and playing around with different flavors of spice (PSpice, LTSpice).
automatic placement and routing of schematics by part list and net list would be cool *looks into the field of dreams*
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
What exactly are you trying to do? Will you have the user draw a schematic with logic gates, and you want the corresponding Boolean expression captured into your program?
Sure, Eagle netlists don't have the part value. That's what the partlist is for. I have a Perl script that converts Eagle netlists to PADS format, but it needs both the netlist and the partlist to work. So does whatever you're doing, probably.
Registered Member #1667
Joined: Sat Aug 30 2008, 09:57PM
Location:
Posts: 374
The user has to verify and complete a semi automatically created set of sub circuits. Therefore I will define some templates but in addition to this, interconnects between points inside the different templates are needed and the user should be able to break up routes and include further conditions by adding and connecting gates.
In both Spice and Eagle, pseudo parts can be defined that the user has to work with. I could choose a suitable prefix to make them identifiable in the netlist as "AND", "NAND", "OR" ... , then I would "only" have to generate some kind of schematic with automatically placed and pre-routed components (and there's the rub, eagle makes it difficult for me at the first glance and the spice netlist looks difficult to read back)
ps.: LTSpice produces these netlists (including desc.):
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
As far as I know, Eagle's ULP language provides complete access to all of the internal data structures that describe the schematic and PCB. You can probably write a ULP that would help you a lot, even if it's just by exporting a netlist in a better format.
A cynic might even say that Eagle is probably mostly written in its own ULP language, and that explains why it gets so slow with big designs. (We have some with 19 A3 sheets, and adding or deleting a pin from the "Gnd" net takes several seconds on a 3GHz P4.) The language itself is quite usable and not a million miles away from C#.
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need a logic editor in my program
