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Daedronus

Mon Jul 04 2011, 03:10PM

Registered Member #2329 Joined: Tue Sept 01 2009, 08:25AM
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Posts: 370

How would you go about measuring the current in the primary of a full bridge smps?

I'm trying to get a full bridge smps working with pulse by pulse current limit.

My last attempt with a half bridge ended when I could not manage to "balance" the bridge when running with regulation (the caps forming a voltage divider on one half of the bridge get unevenly charger).

The full bridge is far more stable, there doesn't seem to have any balance issues (no caps in series to get unbalanced), and there doesn't seem to be any flux imbalances, the current waveforms look symmetrical for the 2 half cycles.

The pulse by pulse also works, but only in the low power low duty cycle range.
As I increase the power the control/duty cycle becomes erratically and at some point it just jumps at 100% duty cycle.

I'm using a current transformer on one leg of the bridge, I suspect this is not good.
I remember hearing that you should use 1 CT on each leg of the bridge...

Any ideas would be appreciated....

radiotech

Mon Jul 04 2011, 06:37PM

Registered Member #2463 Joined: Wed Nov 11 2009, 03:49AM
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Posts: 1546

Is the power source single or three phase? How fast, ie, how many cycles,
of primary current can pass before you have a stable DC reference that is
proportional to the RMS current in the primary?

If slow, then a thermal element device may be an answer. (I^R ~~> DC volts)

Daedronus

Mon Jul 04 2011, 09:08PM

Registered Member #2329 Joined: Tue Sept 01 2009, 08:25AM
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Posts: 370

I don't think that will work, I want to use it for short circuit protection.
The response has to be very fast.

Current transformers are supposed to be fine, I'm just not sure how to use them.

GeordieBoy

Mon Jul 04 2011, 10:21PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

All you need to do is to use a single ferrite CT to sense the load current between one of the bridge legs and the primary of the transformer. i.e. you pass one of the ends of the primary winding through the CT before connecting it to the mid-point of the bridge-leg. (The other end of the primary goes straight to the other bridge leg and doesn't require a CT.)

You then use a full-wave bridge of fast diodes on the secondary of the CT to rectify the current out of the CT. Finally the output of the rectifier feeds the burden resistor. Make sure you put the burden resistor after the rectifier otherwise you will get a huge deadband in the I-sense signal due to the forward drop of the diodes in the bridge!

The constant periodic reversal of the load current prevents a suitably sized CT from saturating.

Any CT that senses the pulsed uni-directional current in one of the bridge legs is likely to saturate unless it has some exotic reset circuit to ensure the core resets before the next current pulse to be sensed!

Also, you may still need some DC blocking capacitance with an H-bridge to prevent flux-walk in the transformer if it is not gapped.

-Richie,

ScotchTapeLord

Tue Jul 05 2011, 01:14AM

Registered Member #1875 Joined: Sun Dec 21 2008, 06:36PM
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Posts: 635

I believe the circuit Richie is describing is the same as what people use in solid state coils.

It is in the bottom left and the CT primary is in series with the load, as Richie describes.

Daedronus

Tue Jul 05 2011, 09:23PM

Registered Member #2329 Joined: Tue Sept 01 2009, 08:25AM
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Current transformer, then full wave rectifier then burden resistor, that is how I was already doing...as I said, it works at low duty cycles...

Gate waveform and output of the CT, as I adjust the output of the CT to the PWM IC

Current measured across the primary, with a resistor. I can't use this for feed back because it's not isolated.....

And last, gate waveform and voltage in primary:

Daedronus

Fri Jul 08 2011, 08:42AM

Registered Member #2329 Joined: Tue Sept 01 2009, 08:25AM
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Posts: 370

Any idea why the current waveforms behave like that?
In the first video it looks almost right, but as a approach 100% duty cycle the current falls and the whole things snaps to 100% duty cycle....

I'm kinda stuck on this whole feedback thing, so any ideas would be appreciated...

Jrz126

Sun Jul 10 2011, 12:03PM

Registered Member #242 Joined: Thu Feb 23 2006, 11:37PM
Location: Erie PA
Posts: 210

A schematic would be helpful.

Is that second turn on blip intentional?

Daedronus

Mon Jul 11 2011, 11:22AM

Registered Member #2329 Joined: Tue Sept 01 2009, 08:25AM
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Posts: 370

I don't really have a schematic for it, it's mostly build on perf boards, but it looks something like this:

The second blip on the current waveform?
I think that is just ringing/not enough snubbing?
Seems to go away as I increase the duty cycle.

I can post more waveforms/different measurements if that would help solve this.

Jrz126

Mon Jul 11 2011, 10:29PM

Registered Member #242 Joined: Thu Feb 23 2006, 11:37PM
Location: Erie PA
Posts: 210

Do you have a resistive load you could use? might be easier to troubleshoot.

Whats your gate drive circuitry? Looking at the primary current from the resistor, you should have a single positive pulse and single negative pulse at 25khz, (like when it goes full duty cycle).

Pics of the circuit couldnt hurt either.

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