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4hv.org :: Forums :: General Science and Electronics
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Some PCB layout questions

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Patrick
Mon Jun 06 2011, 07:56AM
Patrick Registered Member #2431 Joined: Tue Oct 13 2009, 09:47PM
Location: Chico, CA. USA
Posts: 5639
Im always studying the ways and principles of good PC board layout. Are there any webpages or other sources you can reccomend, Dr. slack or anyone else?
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rp181
Mon Jun 06 2011, 08:19PM
rp181 Registered Member #1062 Joined: Tue Oct 16 2007, 02:01AM
Location:
Posts: 1529
Same here, good reading would be great!

Am I getting power to the power plane correctly? I.e. using a couple of large via's.
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ConKbot of Doom
Tue Jun 07 2011, 01:21PM
ConKbot of Doom Registered Member #509 Joined: Sat Feb 10 2007, 07:02AM
Location:
Posts: 329
Dr. Slack wrote ...

snip...

If you need grounds between signals for isolation or impedance control, then put them in manually as tracks. It's too important to lose the control and hope the tools have done what you hoped they have.


Also, for ground traces for isolation between signals should be stitched to the ground plane (with via at regular intervals) if youre trying to minimize noise coupling to adjacent traces. Not so important for low frequency stuff, more important for higher frequency stuff, and pretty much all RF PCBs ive seen have tons of stitching on all the ground pours next to the signal traces to keep the ground impedance low.

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cjk2
Wed Jun 08 2011, 12:25AM
cjk2 Registered Member #51 Joined: Thu Feb 09 2006, 04:17AM
Location:
Posts: 263
Various voltages on the power layer are fine. Mix and match all you want. Keep traces as wide as possible to maximize capacitance. For the clock, you might consider treating it as a transmission line if the run is long and either forward or backwards terminate it to prevent reflection.

$500 is probably too much. This guy will do it for $250 it looks like. http://www.dorkbotpdx.org/wiki/pcb_order

My stackup would be:

Signal
Ground
Power
Signal
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Patrick
Wed Jun 08 2011, 12:37AM
Patrick Registered Member #2431 Joined: Tue Oct 13 2009, 09:47PM
Location: Chico, CA. USA
Posts: 5639
On a board layered as :

Signal
Ground
Power
Signal

The Ground layer should not conduct current right? its there to be a static known reference, and should not develop a Vdrop due to conduction right?

All of the +, -, and ground returns should be carrying power on the traces of the "power" layer right?
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Dr. Slack
Wed Jun 08 2011, 07:04AM
Dr. Slack Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659
The Ground layer should not conduct current right?

The ground layer *will* conduct current, that's what it's there for. However, you can control where it conducts current from and to. Currents will always flow in the ground plane along the route of least impedance. That means that high frequency current will flow under the traces that carry the signals (which minimises the inductance), while low frequcnies and DC will follow the path of least resistance. If you don't have a plane but discrete tracks, or you've turned your ground plane into a "lace curtain" by puncturing it, then the same principle applies. If you've puntured under a high frequency track, then you've made it really hard for the return current, and you may reap the reward. You can use this control over where the ground currents flow to try to make sure that return currents from a strong interfering section do not cause voltage drops across the reference connection of a sensitive section. This tends only to matter for audio and RF work, logic tends to be more robust to low level interference, though you *can* make it go wrong if you really try.

Various voltages on the power layer are fine. Mix and match all you want. Keep traces as wide as possible to maximize capacitance.

Tracks wide to miaximise capacitance? It does, but the amount you can acheive is really sqrt(buggerall). Tracks need to be wide enough to carry the current and keep the volt drop low enough. For a few squinchs on a board you are only talking 10pF to 100pF depending on the core thickness. However you will typically want 10nF per IC, so all the power C you need is provided by discrete components.
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