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Best method of high fidelity audio isolation?

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Tightmopedman9

Thu Dec 09 2010, 06:02AM

Registered Member #3197 Joined: Tue Sept 14 2010, 04:56PM
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I'm looking for the best method of isolating an audio signal with high fidelity in mind, the audio will be between the range of 2kHz-40kHz. I'd like to use an optoisolater or digital isolater due to their small package size and ease of implementation. I'm having a hard time finding any applicable or recent material regarding the use of these components for high fidelity audio. I've read that the linearity of optoisolaters isn't the best, but some chips claim a linearity of .01%. Does anyone have any experience in this area?

Dr. Slack

Thu Dec 09 2010, 08:19AM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

My method of choice for that would be a sigma delta ADC - send the bit stream at maybe 10Mbit/s through digital opto-isolation - and then back to analogue.

Building a sigma delta DAC is trivial, it's called a low pass filter, though recovering the clock and re-timing the data will remove link edge jitter as a source of noise. Building the ADC is not much more difficult, a quad op-amp package and a CMOS D latch is all you need. I can point you at a published reference for the circuit for this if you need it. It effective sampling rate is that of the bit stream, so input anti-alias filter is trivial.

A more intuitively straightforward way of doing the digital bitstream thang is to use a pulse width modulation scheme. A comparator at the sending end compares a linear ramp (this has to be linear to the desired linrearity of your system) at a suitable frequency > f.audio.max, the DAC is again a simple LPF. The sampling rate is much lower than for the sigma delta, so the AA filter would need to be thought about properly. As information is encoded in the edge timing, it's not possible to retime the data, you're stuck with the edge jitter noise.

For linearising an analogue optiosolator, the classic way is negative feedback, where you rely on the matching between the sending one, and a reference one in the feedback path. Noise is the big problem with this approach.

Steve Conner

Thu Dec 09 2010, 10:34AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

How high isolation voltage? What frequency response flatness spec? Is there a limit on stray capacitance between sides?

A good audio transformer from Jensen etc. could easily meet thedistortion spec, if you only want to go down to 2kHz, but they have high inter-winding capacitance.

An ADC with a TOSLINK optical output, and a DAC with an optical input, would be another easy off-the-shelf solution.

Dr. Slack, let's see that reference plz.

Building some sort of sigma-delta converter might be trivial, but getting hi-fi performance isn't nearly so trivial.

Tightmopedman9

Thu Dec 09 2010, 07:03PM

Registered Member #3197 Joined: Tue Sept 14 2010, 04:56PM
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I thought this might have been a fairly simple question, however my research makes it seems like it's quite the complicated one. My idea was to provide isolation and protection for a music device (ipod or similar) when used in conjunction with a plasma speaker. After talking to some of my professors it seems that isolation at this stage of the speaker is trivial, and in high likelihood would actually be more deterimental than useful. It would appear that the more useful isolation would occur between the pulse generator gate and the half bridge gates.

Dr. Slack

Thu Dec 09 2010, 08:10PM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Dr. Slack, let's see that reference plz. Building some sort of sigma-delta converter might be trivial, but getting hi-fi performance isn't nearly so trivial.

Certainly. This is an application which uses a sigma delta converter, rather than being about the converter itself.

The converter is box 17 in the figure on the first page. The converter shown is second order, but the order can be raised to any desired by repeating section 17b a few more times. 3rd order is more common, though I have seen up to 5th order used. The current source 17e is simply a resistor from the CMOS D-latch output.

I will agree that getting HiFi takes a bit of extra work. Not shown in that diagram (as the need for it was discovered later during development) is a small capacitor from the integrator summing junction to ground to take the sting out of the sharp edges of the digital waveform coming back from the D-latch. Without it, the TL074 used has a hard time holding the virtual ground to ground, and the linearity suffers as a result. There are probably better amplifiers to use now, OP275 is cheap and good.

...

Thu Dec 09 2010, 08:56PM

Registered Member #56 Joined: Thu Feb 09 2006, 05:02AM
Location: Southern Califorina, USA
Posts: 2445

If you can find a source of audio that has a toslink output, you can side skirt around the problem by just mounting a toslink receiver in your speaker.

Many laptops can be configured to ouput spidf over coax, which can be converter to an optical output with a simple adapter. From there you just need a toslink->analog coverter ('dac') inside of your tesla coil, you can buy these premade for ~$50 or there are a number of designs out there from the audiophiles to make them from discrete parts.

GeordieBoy

Thu Dec 09 2010, 10:29PM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
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Two things come to mind here:

If the end application is for a plasma speaker, then you really don't need to worry about the isolation barrier being ultra high-fidelity. The behaviour of the spark or corona loading on the resonator itself is highly non-linear, and is likely to cause much more harmonic distortion than any decent audio transformer. If you use Frequency Modulation and rely on "slope-detection" to produce the audio from the TC then this also becomes very non-linear for loud signals with deep modulation. I think a few percent of THD from a cheap audio transformer will be the least of your worries.

Also, I'm not sure why you need to have galvanic isolation between the audio source and the controller anyway? Whatever controller you use to implement the modulation usually runs off a low voltage DC supply and should be grounded to mains earth for electrical safety. Isolation from the mains line can be guaranteed by using an approved DC power supply. Likewise the controller usually drives the power electronics via gate-drive transformers which provide the galvanic isolation from the high-voltage supply.

If you have a choice of where to put the isolation it is better to put the isolation barrier between the controller and the power electronics. A decent gate-drive transformer here will contribute minimal distortion to the audio modulation being conveyed to the power stage.

-Richie,

Steve Conner

Fri Dec 10 2010, 12:42PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Gosh, and look whose name is on the patent

I'm asking as I've recently got interested in sigma-delta modulation for power electronics. It seems to be a very powerful concept that could be applied to anything from a SLR CCPS, to an audio modulated SSTC or a Class-D audio amp.

You already answered one of my questions, and I think I understand why the integrators have lead networks, but the other one is: Should the comparator have hysteresis or not? If it should, is there a way of calculating how much?

Dr. Slack

Fri Dec 10 2010, 04:59PM

Registered Member #72 Joined: Thu Feb 09 2006, 08:29AM
Location: UK St. Albans
Posts: 1659

Yeah, sorry about the choice of source, shameless.

I think I understand why the integrators have lead networks, but the other one is: Should the comparator have hysteresis or not? If it should, is there a way of calculating how much?

It's OK to have one integrator in the feedback path, but all the others must be broken back to flat gain before the loop bandwidth to maintain stability. You might expect better stability if they were all broken back, but this seems to result in poorer overall performance. The comparator does not need hysteresis for system level performance. The latency of the D-latch D to Q and the chain of amplifiers mean that it doens't toggle too fast. If the slew is very slow and the comparator very fast, then it may benefit from hysteresis at a component level for power consumption or interference reasons.

What may have been in your mind when discussing comparator hysteresis was the related D latch metastability. Each time it succumbs it will generate an error, by dint of its clock to output delay lengthening a bit for that cycle. The fed-back signal will be different to what the digital output is saying it is, which is bad. On the good side, metastability happens rarely. How few people know about it shows how rarely it is a problem. On the bad side, it is absolutely unavoidable, even if it can be driven down to one hit in the age of the universe by suitable design. If an occaisional glitch from metastability is not permissible, then two D-latches in series ( a 2 bit shift register ) is roughly twice (in exponential terms) as resistant as a single one, taking the rate down from almost never, to in practice indistinguishable from never.

Intimately related to breaking the integrators with lead networks is the concept of loop stability, and phase shift round the feedback loop. The mean 0.5 clock cycle latency through a D-latch (1.5 cycles if you are using 2 in series) adds to the total phase shift. So given a target operating bandwidth, there are two limiting speeds to consider running the clock at. 1) As slow as possible, where clock latency is a comparable contributor to phase shift along with the analogue filter. The result is optimum in terms of fewest bits per Hz of converted bandwidth. The output has short runs of 1s and 0s, and looks pretty random whatever the input voltage. This is the scheme to go for if you are subsequently putting the bits into a digital filter, microcontroller or PC, as there's less data to handle. 2) Very fast, where the phase shift is dominated by the analogue feedback, so you can work the feedback a bit harder for the same bandwidth. The output has long runs of 1s and 0s, and looks not unlike PWM, with a bit of added edge jitter. You don't really want to deal with this fire-hose of data in a filter, this is the sort of bitstream that you'd piss through an opto coupler or fibre and then straight into a DAC again.

There's no limit to the order of the converter. I've had 8th order running, just to show it could be done but there's litle performance benefit, orders above 5 are pretty much unheard of commercially, 3rd or 4th is about right.

One important wrinkle not shown in the diagram. Once the loop has order > 2, it is capable of sustained oscillation from + overload to - overload. Although when operating at its target gain the loop can be made stable, when overloading, the gain drops, and those who have used Bode plots to graph the gain and stability of higher order systems will know that the drop in gain will shift the unity gain frequency down to where the integrators are not broken back, total phase shift goes through 180, and the result is sustained oscillation. It is termed a conditionally stable system. The answer is to put back to back diodes across all of the broken integrator capacitors. Then when overload happens (as it will), the order of the system drops to one, and normal operation is restored very quickly.

Of course with a comparator in the feedback path, you can't actually do Bode sums, it's not a linear loop. However, the general principles apply. Some people have used what they call describing functions, which models the comparator as having an average gain, and claim to do accurate maths on the thing, but it seems a bit of a kludge to me, adjusting a fiddle factor until the so-called analysis agrees with the simulations. The easiest way to understand what's going on is simply to program a simulation of it and watch what it does. Starting with a single integrator, which is stable, and identical to a classic charge-balancing ADC, then add broken integrators one at a time and see what you have to do with their time constants to keep the whole thing stable.

sigma-delta modulation for power electronics. It seems to be a very powerful concept that could be applied to anything from a SLR CCPS, to an audio modulated SSTC or a Class-D audio amp.

I think power electronics would benefit from version 2, which bandwidth for bandwidth would result in a lower overall switching frequency and so better efficiency.

You don't have to generate the bit stream by running a real ADC of course. There are several ways to generate a delta sigma bitstream from a PC, microcontroller or FPGA. The most obvious way is to simulate a delta sigma ADC, but there are others which produce bitstreams with different compromises of properties.

Steve Conner

Sat Dec 11 2010, 03:31PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Dr. Slack, thanks for the info!

Yes, I was thinking of metastability. The sigma-delta converter reminds me somewhat of the little test circuit in The Art Of Electronics for inducing metastability in flip-flops, so I thought the comparator might have to be specially hardened against it. But I also know that hysteresis doesn't get rid of metastability, so I don't really know what I was thinking.

I think for all of my possible applications, 2nd order is the most I'd use. If I understand right, the output filter in a Class-D amp would be one of the integrators. (OK, it's actually a 2nd order filter, but I have some ideas related to that that I don't want to publish just now) And, the resonator of a Tesla coil would also be like an integrator in the envelope amplitude domain.

So, if I understand right, just putting bang-bang control on either of these would yield a 1st order modulator, and adding an integrator would make it 2nd order.

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