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Registered Member #347
Joined: Sat Mar 25 2006, 08:26AM
Location: Vancouver, Canada
Posts: 106
Ever since seeing high-speed shots on Mythbusters, I just had to have a high-speed camera. However, base models start at about $12,000, obviously way too expensive. So, I decided to make my own. Mike's high-speed camera controller over at electricstuff.co.uk gave me a lot of inspiration to try this. This is my first significant project in programmable logic devices, I did a little bit of work with PAL chips when I was at BCIT. This whole project has been a tremendous learning experience.
The image sensor I used is made by Cypress semiconductor. For this relatively cheap camera I chose the LUPA-300. This sensor is capable of 640x480 @ 250fps, and increased speed at lower resolution, eg. 320x240 @ 940fps. For more info, see the datasheet. It has internal ADCs, and outputs data as 10-bit words at 80MHz. Cypress also makes a much larger sensor, 1280x1024 @ 450fps, but the FPGA dev board I have can't support the 160 bit data bus that would come off the 16 ADCs. I may try that sensor in a later project.
This camera is based on a Xilinx Spartan-3A FPGA development board. It has a 700K gate equiv. FPGA, as well as lots of nice hardware, such as 64MB of DDR2 RAM, a 10/100 ethernet PHY, VGA and serial ports. The sensor is mounted on a small board that plugs into the expansion port. The image sensor digital IO runs at 2.5V, and the FPGA IO runs at 3.3V on this board. Some high-speed level translators are used for signals going from FPGA to sensor, and sensor outputs are connected directly to the FPGA. The IO pins on the FPGA can be programmed to take virtually any logic level in, regardless of IO bank supply voltage.
I'm currently relatively far along in this project, I recently reached a major milestone, the first image displayed. Parts completed include:
VGA timing generator
Display hardware to buffer data out of RAM and display it on the VGA output
DDR2 controller and access arbiter (gives multiple systems prioritized access to RAM)
Embedded Microblaze CPU for control
Microblaze to DDR2 Ram access hardware
Basic Ethernet MAC (no CSMA/CD, so direct link or switched networks only, no hubs)
Hardware to read data from the sensor and write it to RAM
I'll go through the basic operation of each piece of hardware, if you want specifics, don't hesitate to ask.
VGA timing generator: Simple set of counters and value comparators that generate H and V sync signals and X and Y position outputs.
VGA display hardware: This has two functions, to get image data out of RAM for display, and to give a text display for status information. Registers are available to set where to pull image data out of ram, what size of frame the data should be interpreted as, where it should be displayed, and what zoom level. Zooms of 1x to 4x are supported.
The text display provides a RAM to write ASCII text into, and the hardware takes care of displaying the characters.
DDR2 Controller: This is simply code generated by the Memory Interface Generator provided by Xilinx. It converts the double data rate interface of the RAM into a single data rate one for ease of use in the FPGA, and takes care of refreshing the memory. The RAM is 16 bits wide, running at its minimum rated clock speed of 125MHz. Considering the DDR nature of the data, this give about 500MB/sec read or write speed.
DDR2 Arbiter: Allows the various systems to all have access to ram, in a prioritized manner. For example, accesses from the display hardware have a higher priority than accesses from the CPU, to ensure the line buffer always gets loaded in time.
Embedded CPU: Microblaze CPU core that comes with the Embedded Development Kit. It's RISC CPU running at 80MHz, with a rather small 28k of internal memory available. It will basically run the show, controlling all the hardware.
Ethernet MAC: A simple Ethernet media access controller, which communicates with the physical layer chip, and provides buffers for transmit and receive data. I haven't implemented CSMA/CD yet, so it cannot be used on hub based networks.
Sensor image data write: Buffers data off the sensor in a FIFO and periodically empties the FIFO into the main RAM. Destination address in RAM is set by a register accessible from the CPU. Data comes off the sensor at just under 80MB/sec at full speed.
There's still lots of work to do before I can take any video, but it's getting closer. The hardware is nearing completion, most of the work left is software for the Microblaze CPU. I need to write code for the Ethernet interface to download video off the camera, and code to set image sensor modes, start and stop recording, etc. I also have parts on order to make a lens mount, to hold standard C-mount lenses.
Here are some pictures of the hardware setup:
FPGA board
Sensor Board front. Due to a problem with the file I sent the PCB manufacturer, the ground plane wasn't produced, so I had to run wires around to all the ground connections.
Sensor board back. Lots of bypass caps for various supplies. Probably way overkill, but it couldn't hurt.
First image. A bug in the sensor data write hardware is causing some lines to be written to the wrong address in RAM. The lens also flips the image upside down, I need to set a register in the sensor to reverse Y readout.
Bug fixed after about 8 hours debugging
Stay tuned for updates.
#---------------------------------------
------------------------------------ Update: Feb 14th, 2008
Quite a bit of progress in the last few days. I got the SPI hooked up to the image sensor, and am finally able to change registers in the sensor.
I'm currently working on a tough problem with the interrupts for VGA V-blank start and image sensor end of frame. The interrupt status and enable registers are not being read properly for some reason, so I can't tell what interrupt has occurred when the ISR is executed.
I also added 4 bits to each resistor DAC for the VGA port, the FPGA board only had 4 bits per color.
#-----------------------------------------
---------------------------------- Update: Feb 20th, 2008
Fixed the problem with the interrupts, it had to do with leaving data on the data bus when a read wasn't requested.
Fixed pattern noise (FPN) correction is now implemented in hardware, offsets for each pixel are subtracted in real-time as the data comes off the image sensor. I also did a software implementation to test how well it would work, that took about 8 seconds per frame, the hardware does it at 250fps.
I'm beginning to have problems getting everything to fit on this FPGA and meet timing. As the chip gets full, routing gets less and less optimal, increasing delays and reducing the maximum clock speed.
The software is far enough along to make recordings, but there's no way to download video off the camera yet.
#-------------------------------------------
-------------------------------- Update: Feb 23rd, 2008
Major milestone - the first recording downloaded off the camera:
Spinning up a top and dropping it Video 1 (1.5MB, XviD) Record mode: 320x240 940fps, 457uS exposure time, playback rate 30fps Lighting: 2 * 100W Halogen ~40cm away
I've got a very basic command line program working that allows the PC to query the camera for what video it has in memory, download frames off and save them as an uncompressed AVI. It's still buggy, if a packet is dropped it gets stuck it has to be restarted, but I couldn't resist making a recording.
The next priority will be a proper lens mount, the lens system currently consists of a 15mm f/3.2 lens out of a microfiche, taped to the top of a Lego motor. The main part for the proper lens mount finally came in today: an M42 to C-mount adapter. It's basically a flat plate with a 1" female C-mount thread inside and a 42mm dia. male thread on the outside. I'm going to drill and tap holes in it and screw it to an aluminum plate that will be mounted in front of the sensor board. I'm still waiting for the lens to come in, though.
#----------------------------------------
----------------------------------- Update: March 6th, 2008
Got the lens mount done, so the camera is now practical to use. See the videos thread here.
Registered Member #347
Joined: Sat Mar 25 2006, 08:26AM
Location: Vancouver, Canada
Posts: 106
I was using an old lens off a 16mm film projector for those test images, just sitting it in front of the sensor. The focal length of that lens is 50mm, so it was zoomed in way too far. An object 10cm wide about 1m away filled the whole frame.
Registered Member #33
Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971
Wow, the video quality is excellent for 940FPS. I'm very impressed at how far you have gotten in this short time. Are you going to publish board layouts, code and HDL when the project is finished?
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