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4hv.org :: Forums :: General Science and Electronics
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Generic half bridge TO-247 IGBT/MOSFET PCB design

Author Post
Tue Jan 10 2017, 10:12PM Print View
Registered Member #30656
Joined: Tue Jul 30 2013, 02:40AM
Location: UK
Posts: 182
I've been CADding up some PCBs for my QCW coil recently, and realised that some of the design could be useful for others too.

I took a midpoint of my half-bridge PCB design (have made changes since which make it more specialised for my particular application) and made it a bit more generically useful (added many mounting/connection holes, capacitor mounting footprints etc).

- It's based around a Fischer Electronik SK 481 heatsink, which is a nice PCB mountable size and comes in a width suitable for having a separate heatsink per device for minimising case-heatsink thermal resistance (important for minimising thermal cycling stress in QCW type duty cycle operation). It could also be used with other heatsinks though (taking care to insulate the PCB tracks behind the IGBTs/FETs), or even with the devices mounted below the PCB.
- Option for 2 parallel IGBTs (see pic below). Would need gate drive sharing resistors or suitable ferrite beads to be placed if parallel devices are used (footprints provided).
- Gate drive connections are via 20-way ribbon cable (each gate has 4 pairs for a low inductance connection).
- Footprints are provided for various film decoupling capacitor options, some ceramic parts on the back, and also for 2 snap-in electrolytics if desired.
- Files are in Altium format, and I've generated Gerber/BoM/PDF schematic outputs for a few different possible configurations of parts fitted. For jazzy 3D rendering try look at the last page of the schematic PDF in a 3D-PDF capable viewer :)
- Gerbers have been generated following this guide: , if anyone needs something different but can't use Altium then I can probably whip up another set of Gerbers.

Files are located in this git repository: (click "Clone or download" then "Download ZIP")

I can't guarantee I'll be able to provide much assistance to anyone wanting to use this (got 2 more boards to finish before chinese new year!), but hopefully it is of use to some.

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Sun Jan 15 2017, 11:37PM
Registered Member #2906
Joined: Sun Jun 06 2010, 02:20AM
Location: Dresden, Germany
Posts: 522
each gate has 4 pairs for a low inductance connection).
Sounds like vodoo magic. What makes it low inductance is not only the width of the current path, but also the loop of the current path.
The right way would be to alternate GND-Signal-GND-Signal-GND. If you really think you need more than one input connection.. The width of a current path makes it low impedance, it does not mean that the whole current path issnt a parasitic transformer automatically - you can wind an air core transformer with thick wire too
If you wanted it to be low inductance because its a direct gate connection and you do not have planned a gate driver as close as possible on the PCB itself, then i would say this is a major design issue anyway. (sry didnt look at your .schdoc - a pdf of it would help a lot)

Please reconsider your clearance. Its does not look as big as possible. I would recommend more than 1.6mm - 1.8mm for 600V. (which is maybe the minimum if you want to be versatile)

The vias around the TO247-Pads are a great idea - it just seems that you placed them with the wrong intention.
If you think this will help current sharing between the top- and bottom solder pad thing about it again: the thick TO247-leg is way lower resistance than the vias. Current sharing should be done not only on one pin of the trace. If you have no parallel trace on the opposite pcb-side, then this will not improve things much. If you have you can add vias over the whole trace length.
However for a prototype-board those vias are the perfect solution to reduce the chance of pcb damage when changing the IGBTs. These vias pin down the solder pads you the do not become loose even after several high temperature soldering processes.
Unfortunately you forgot the gate-pad which does not have this mechanical copper reinforcement. I would suggest you add those vias there too.
Also to ease a damaged device removal, consider increasing the drill diameter +0.2mm over the suggested datasheet recommendations. This will ease removal of solder.

I hope this helps
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Mon Jan 16 2017, 12:36PM

Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971
Nice! This is exactly what we need more of here. It looks like a very solid layout.

DerAlbi wrote ...

each gate has 4 pairs for a low inductance connection).
Sounds like vodoo magic. What makes it low inductance is not only the width of the current path, but also the loop of the current path.
The right way would be to alternate GND-Signal-GND-Signal-GND. If you really think you need more than one input connection..

If I'm not misunderstanding, that's exactly how it is wired here. Consider how the two row header maps to the ribbon cable wires. This gives the lowest practical loop inductance that can be made using ribbon cables.

There is a pdf of the schematic on github, it can be found under IGBT_half_bridge/Reference Outputs/Schematic & BoM/

I agree on the point of clearance, it's not critically small but it could be increased for some better margin of comfort.
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Tue Jan 17 2017, 04:12PM
Registered Member #30656
Joined: Tue Jul 30 2013, 02:40AM
Location: UK
Posts: 182
Thanks for the replies and suggestions!

- As Wolfram pointed out, the ribbon cable indeed is wired in alternating fashion for low loop area

- Gate drive is off board as it was intended for drive via gate drive transformer, as per most DRSSTCs. Could always mount a driver on a sub-board directly to the ribbon cable header connection.

- Schematics, renders etc located under "reference outputs" directory

- The vias around the holes were mainly for mechanical reasons, though I figured they wouldn't hurt with sharing current between layers either. I was mainly worried about the holes connecting to planes, so didn't put them around the gate connection, but I probably should do this one too.

On the point of clearance, I was also worried about it, and I hope it is enough for the 350-400Vpk I expect it to see. The newer version of this board has a slightly greater clearance, but I should probably try a bit harder still, and look at putting in slots etc.

If anyone uses this design then I suggest they make up their own mind as to whether it is good enough for their needs. I (or others with Altium) can relatively easily modify the polygon clearance rule and re-do the gerbers if they want, but it might need some tweaking afterwards. Slots would be more work again, and possibly difficult to fit without more substantial re-design.

Please see the new thread I have made about the QCW coil I was initially designing this PCB for, it includes the more specialised version of this board I alluded to in the first post:
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