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Eliminating phase shift in SSTC feedback

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Avalanche
Fri Dec 09 2011, 08:35PM Print
Avalanche Registered Member #103 Joined: Thu Feb 09 2006, 08:16PM
Location: Derby, UK
Posts: 845
I'm trying to produce an SSTC feedback scheme which does not produce a significant phase shift (say +/-5°) , and which works consistently over a wide variation of DC bus voltage, and therefore output power (something like 5-100%, independent of breakout).

A bit of background: After a few lunchtimes of reading the archives and looking for threads relating to antenna and base feedback, and trying a few experiments myself, it's looking trickier than I had originally thought! It appears that most SSTCs are tuned by sheer luck, by getting the antenna into a position where it is both picking up a strong enough signal, and more importantly providing the correct phase shift in the feedback to whatever controller is being used. If a 4049 PLL is used with phase comparator 1 (as is common with SSTCs) then there is yet another uncertainty - the PLL is producing a variable phase shift in order to produce it's tuning voltage, and this is yet another shift which must be compensated for, usually by moving the antenna around!

This is all ok as long as the SSTC is 'set up at maximum output power' as is commonly recommended. The problem is I want a wide dynamic range. Antennas are out due to their complete randomness, so I'm using a CT in the secondary base for my current feedback, and an extra winding on the gate drive transformer to produce my bridge voltage feedback. A PLL using the type-2 comparator will tune the coil by locking these two signals in both frequency and phase.

I didn't actually mean to write that much without actually getting to the point! My CT appears to be picking up more of the electric field component than the base current, as it's output is shifted by 90 degrees at resonance! Has anyone ever found the need to sheild the CT, and if not how/why not? So far I've tried 4 CTs (all 100T) - E core ferrite, ferrite rod, ferrite ring and iron powder ring. Ferrite ring produces the best signal.

Any other tips to help me get good feedback signals would be appreciated. In case anyone is wondering, this coil will be used with an audio modulated QCW modulator. I'd like to avoid any type of 'open loop' compensation for phase shifts, so my PLL is locking to genuine signals. smile



1323462424 103 FT0 Tc Feedback
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GeordieBoy
Sat Dec 10 2011, 05:43PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
A bit of background: After a few lunchtimes of reading the archives and looking for threads relating to antenna and base feedback, and trying a few experiments myself, it's looking trickier than I had originally thought!

Yes, it is definitely hard to design a feedback system that does not introduce any noticeable phase shift. Propagation delay of logic gates, gate-driver ICs and GDTs, and MOSFET switching times all add up to make the inverter output voltage lag whatever is acting as the switching reference. So even if your CT can sense the zero crossing of the secondary base-current, by the time this message propagates through your logic and gate-drive IC's and the MOSFETs finally start to switch it will be at some time after the base-current zero. Whether or not you see this delay as a problem depends...

When you close the loop on a high-Q system like a Tesla Resonator using CT feedback it will always oscillate at the point where the total phase shift around the system is 180 degrees provided there is sufficient loop gain. So the system will always oscillate, but the phase shift contribution from propagation delays in the power electronics means that the frequency of oscillation will not be exactly at the natural resonant frequency of the TC secondary. The system will actually oscillate at whatever frequency the total phase shift adds up to 180 degrees. So if you have 10 degrees of phase lag from the inverter's propagation delays, then it will oscillate at the frequency where the TC resonator contributes 10 degrees of lead, and the phase of the feedback makes up the remaining 180 degrees.

For a high-Q Tesla resonator you will notice that the phase slews very abruptly through 180 degrees around the resonant frequency. This rapid rate of change of phase means that even if the system oscillates at a frequency where the phase is say -10 degrees, it will still be quite close to the natural resonant frequency of the secondary. You won't loose much amplitude at the top of the resonator, so it might not be as bad as you first thought.

There are also instances where some phase shift in the load is desirable. For instance an H-bridge of MOSFETs operates best driving into a load with at least some inductive component, so will benefit from some phase-lag in the current. Conversely, an IGBT bridge will operate best when the current waveform leads the voltage as this gives soft turn-off of the IGBTs minimising tail current losses. However, if you are trying to perform accurate measurements on the parameters of the system any un-wanted phase shifts may complicate this process.

You can trim out any phase lag due to propagation delays in the inverter by introducing a variable phase-lead element into the feedback circuit as myself and Finn Hammer discussed some time ago. In theory you simply adjust this element to give enough phase lead to equal the amount of degrees of phase lag that the propagation delay contributes at the operating frequency. Therefore the net phase shift from CT to inverter output is zero at the operating frequency. This can be done various ways. For instance you can introduce a variable inductive element in series with the CT's burden resistor, or derive some sort of active all-pass filter or PD compensator circuit with op-amps to process the raw output from the CT and give it some phase lead.

A static compensation method like this works great in theory, but less perfectly in a real dynamic system for a number of reasons:

1. A fixed propagation delay of the inverter in nanoseconds only equates to a fixed phase shift at one specific operating frequency. When corona loading changes the operating frequency that fixed propagation delay now represents a different phase shift at this new frequency. Therefore the phase-lead compensation is now no longer perfect and needs some adjustment to get zero net phase shift at the new operating frequency.

2. The introduction of necessary dead-time in the MOSFET gate drive waveforms to prevent cross-conduction means that the inverter output voltage can actually slew at any time during the dead-time interval depending on the nature of the load. If the load appears inductive the mid-point voltage of each bridge leg will be driven to the opposite rail by the free-wheeling current as soon as the presently conducting device turns off. Essentially the output voltage waveform from the inverter will have its transitions syncronised to the devices gate-drive turn-off edges. However, if the load appears slightly capacitive, then the mid-point voltage of each bridge leg will not slew to the opposite rail until the end of the dead-time when the next devices turn on. This will cause the inverter output voltage transitions to be syncronised to the gate-drive turn-on edges. Less reactive loads in between these two extremes will result in the inverter's output voltage transitioning somewhere in between these two extremes. My point is that the timing of the inverter's output voltage is determined as much by the reactive nature of the load as by the gate drive signals.

3. Finally, the device capacitances of MOSFETs (and IGBTs to a lesser extent) vary significantly as you vary the supply voltage up to several hundreds of volts. As you know it is the Cdg Miller capacitance that puts the most burden on gate-drive circuit and contributes largely to turn-on and turn-off delays. So as you vary the supply voltage you have another factor that contributes to variable propagation delay or phase shift. (This varying phase-shift with supply voltage is a particular problem with solid-state Class E and DE power amplifiers used in AM radio transmitters, where amplitude modulation causes incidental phase-modulation in the broadcast signal.)

The only way I can see to force the inverter output voltage to be in-phase with the secondary base current would be to sense both of them with a VT and CT respectively and feed them into a phase-locked loop with high DC gain in the compensator. That will try to servo the operating frequency of the inverter such that the total phase difference between the two waveforms is always zero. I'm not sure whether this type of arrangement will actually be stable though, as the variation in timing of the inverter output waveform due to the deadtime I mentioned will appear as hysteresis inside the control loop.

Regarding the CT on the secondary base wire, I wouldn't have expected to see a problem with this. If you use a high-permeability Mn/Zn ferrite toroid it should not pick up much of the surrounding magnetic field. Measure the secondary base current with the CT at a point where it is well out of the primary's magnetic field anyway just in case, because a toroidal CT can appear as a single turn loop to external fields depending on how you wound it.

A CT should not be sensitive to the surrounding E-field because it's output is almost shorted by the burden. What makes you think the base-current CT is picking up voltage from the top of the Tesla resonator? The CT output should peak in amplitude and be in-phase with the inverter output voltage when you go through resonance. Both of these waveforms will be in quadrature with the voltage at the top of the TC resonator at resonance. The inverter output current will most likely be somewhere in between these two if you are driving the resonator from a primary via link coupling. The inverter output current is the vector sum of the reflected secondary base current (in-phase) and the primary magnetising current (90 deg lagging.) If you are still convinced the base current sensing CT is picking up the secondary E-field, you can put the whole CT in a sealed grounded metal box with only a couple of tiny holes in it big enough to pass the secondary base wire through on it's way to the RF ground. Put the burden inside the metal box too and run the output voltage through a chassis mounted BNC and away via coax.

Another thing to check for is that your CT burden is resistive at the operating frequency. A wirewound resistor that looks inductive would produce a phase lead in the CT output voltage.

I hope this helps. Good luck with this interesting work!

-Richie,
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Steve Conner
Sat Dec 10 2011, 06:15PM
Steve Conner Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
Great stuff Richie!

At this point I should plug my Mk2 PLL driver, which uses a Type 2 loop as discussed by Richie above. The Mk1 was a little random, so I did a lot of experimentation, and the Mk2 solved the phase shift problem well enough that I never felt bothered to improve it. I've built eight of them so far: two for me and 6 for Finn.

The schematics, details of operation and so on can be found at Link2

I'm busy dragging it into the QCW age just now. smile
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Avalanche
Sun Dec 11 2011, 12:31PM
Avalanche Registered Member #103 Joined: Thu Feb 09 2006, 08:16PM
Location: Derby, UK
Posts: 845
Thanks for the very informative reply Richie, that has given me a lot to go on and I have printed it out so I can take it to the workbench!

I'm about to order a few bits from Farnell, particularly some new cores for my CT and GDT as the ones I am currently using could be anything. (I've gone for Epcos N30 material, it was either that or the Ferroxcube 3E25, but the Epcos appears to have a slightly better high frequency response at the expense of bit lower permeability).

I hadn't thought about the band of uncertainty introduced by the dead-time, so thanks for highlighting that too! Another thing I will be investigating. I had originally thought about taking my inverter voltage feedback from another winding on the GDT, but I guess it wouldn't be too hard to produce a feedback VT using another one of the new cores.

What makes you think the base-current CT is picking up voltage from the top of the Tesla resonator?
I think I was using too high a resistance for the burden (between 100ohms and 1k) in the hope of still being able to clip the signal and input it directly to a logic gate. Touching the CT increased the amplitude of the signal, and it appeared to be roughly 90 degrees offset, but I guess it could also be picking up some of the primary current. I'm going to drop it into a screening can anyway.


Steve - I'm sort of basing my driver on your Mk1 PLL driver at the moment, despite the warnings, but using a type 2 loop instead. It's more of a prototype on stripboard at the moment, just to play around with and to try to get something stable that can achieve lock easily. I do mean to check out your Mk2 driver soon to try and understand it all! smile

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GeordieBoy
Mon Dec 12 2011, 03:22PM
GeordieBoy Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
I hadn't thought about the band of uncertainty introduced by the dead-time, so thanks for highlighting that too! Another thing I will be investigating. I had originally thought about taking my inverter voltage feedback from another winding on the GDT, but I guess it wouldn't be too hard to produce a feedback VT using another one of the new cores.

During the dead-time it is the load itself that defines how the current commutates between diodes. If you were to directly base-feed the resonator from a half-bridge at precisely it's natural resonant frequency the output voltage from the inverter actually does this:

Link2

This is because the load current goes through zero and changes direction mid-way through the dead-time interval. At device turn-off, initially the positive load current drives the mid-point to one rail, then when the load current changes direction it is driven to the opposite rail. Finally when the next MOSFET turns on at the end of the dead-time the final fate of the mid-point voltage is decided! This weird "double clocking" appearance to the edges is perfectly normal behaviour if the dead-time is quite large and a resonant load is being driven perfectly in tune.

Normally you don't see it though if you are driving the resonator via a link coupled primary. At resonance the secondary reflects back a purely resistive load but this appears in parallel to the magnetising inductance of the primary coil. Therefore at the resonant frequency of the secondary the inverter always sees a slightly inductive load due to the magnetising current contribution. Provided the primary inductance is quite low, the magnetising current at the end of each switching period is usually sufficiently large to stop the total load current seen by the inverter swinging through zero during the deadtime.

Either N30 or 3E25 should be fine for CTs and GDTs in the low 100's kHz region.

-Richie,
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