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SSTC FETs dying for no reason (was: MOSFET failure modes)

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LAN_403

ScotchTapeLord

Mon Apr 12 2010, 12:51AM

Registered Member #1875 Joined: Sun Dec 21 2008, 06:36PM
Location:
Posts: 635

Luca wrote ...

Dr. Kilovolt wrote ...

This is the schematic I'm using right now: (not shown in the schematic the 500W series lightbulb)

Hi Dr. kilovolt

In my opinion your mosfet failure is due to voltage spikes between S-D. Maybe adding 10uF between the DC bus (in parallel to the DC blocking caps, very close to the mosfets) will help to reduce such spikes... I would add TVS between S-D of each mos as well.

Regards,

Luca

10 uF would be way overkill for this SSTC... That's more appropriate for a DRSSTC. Even if the DC block caps didn't completely suppress the entire spike, the voltage spikes would probably not exceed 400V at these currents.

Dr. Dark Current

Mon Apr 12 2010, 06:49PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Sorry a slightly offtopic question but I dont want to start a new thread, should I ground the driver to mains earth when the secondary is grounded to it too, leave it floating, or ground it just through some resistance (1k?)?

Arcstarter

Tue Apr 13 2010, 01:33AM

Registered Member #1225 Joined: Sat Jan 12 2008, 01:24AM
Location: Beaumont, Texas, USA
Posts: 2253

Dr. Kilovolt wrote ...

Sorry a slightly offtopic question but I dont want to start a new thread, should I ground the driver to mains earth when the secondary is grounded to it too, leave it floating, or ground it just through some resistance (1k?)?

I normally ground everything to mains ground for small SSTC's. If the voltage on the mains earth ground is high enough to kill your driver, chances are that you have much bigger problems to worry about. Just keep the resistance from the secondary to ground low, but it would have to be a significant resistance to do any damage.

Dr. Dark Current

Tue Apr 13 2010, 09:04AM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Ok, I was just worried about that the secondary base current might induce some rf voltage on the earth wire inductance, and that it could upset the gate driver with its ground potential oscillating at few hundreds khz...
I think Ill put some rf bypass caps between live-earth and neutral-earth.

Steve Conner

Tue Apr 13 2010, 09:14AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

I posted this before, but I think it got deleted for some reason.

Do you have zener diodes between gate and source on your FETs to clamp any transients? The gate waveforms might look clean, but they can get nasty when the DC bus voltage is applied, because of Miller effect.

Having said that, +1 on the other comments about high stray inductance.

GeordieBoy

Tue Apr 13 2010, 11:22AM

Registered Member #1232 Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881

As steve C said you really need to look at the gate and drain voltage waveforms whilst running at full-power. At least you are lucky in one respect, that you can run it at full power for some time and store waveforms. The worst failures to analyse are those that occur almost immediately before you can take any measurements.

Also if your layout is still a birds-nest of wiring, then don't try to switch the MOSFETs quickly. You will develope huge switching spikes from high di/dt across all of the stray inductances in the circuit. Poor layout = High stray inductance = Ldi/dt voltage spikes = Slow switching speeds = Poorer efficiency. Once you tighten up the layout to minimise stray inductance you can speed up the edges of the gate waveforms.

Finally, the IRF740 devices are fairly feeble for serious power electronics work. I wouldn't use them to process more than a couple of hundred watts because the package isn't really good for dissipating much power. Also they are only rated Id=10A if you can maintain the die at 20'C! With device internal thermal resistance, and the thermal resistance from tab to heatsink the die temperature will be much hotter than the heatsink when you are dissipating power. The Id rating falls to 6.3A continuous with a 100'C junction temperature.

-Richie,

Dr. Dark Current

Sat Apr 17 2010, 07:56PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Ok this set of FETs lived long, but finally died, just after I installed an "electronic fuse" (with a SSR) on the input of the coil...

I think Im gonna build it into the PC PSU case as the "final version" with a real PCB, I wanted to experiment with the detuning circuit but guess I won't because I don't want to kill more FETs. If that won't fix the problem then I'm completely lost.

EDIT: Unlike previously, this time one of the FETs was a total short...

Dr. Mario

Tue Aug 03 2010, 04:19AM

Registered Member #3059 Joined: Tue Aug 03 2010, 04:09AM
Location: My turf
Posts: 18

Okay, may I ask you a question?

Did you measure the ampere from the point where electrcity
enters your H-bridge switcher? By my experience, even BIG ampere
can kill those poor little transistors instantly, with little or NO heat
from that dying FET die. Blown few, built better one. We just mess
up and move on learning something brand-new - also learning the
important rules-of-thumbs while building new one.

Oh yeah, and make sure you're using the correct capacitor rating
and type for the load oscillator. (The same for Induction heater).

Also, a hint: Try scope your gate drive waveform.

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