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Registered Member #15
Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068
Chris,
On the subject of primary current, since you seem to like bells and whistles, you should incorporate a peak current "VU" type meter in your DRSSTCs. (See attached image)
Basically just take your sampled primary current signal, run it through a buffer and peak detect with an RC filter. Then run this into a LM3916 BAR/DOT Driver display chip to run a 10 LED bar meter. Select the RC time constant so that it averages out the peak current enough to provide a somewhat "smooth" signal to the LM3916 but short enough so that the peak current detector will respond fast enough to changes over all ranges of duty and peak current. Works awesome and looks great too.
The panel attached here is the one I am using for our commercial system (real pics not released yet until its completely finished)
Its also pretty useful too since you can get a good idea (without having to use test equipment) of where your DRSSTC is operating current wise.
Registered Member #358
Joined: Sat Apr 01 2006, 06:13AM
Location: UCSB
Posts: 28
I have actually done the thermal calculations for a condition such as this and heat dissipation increased three-fold without synchronized shut-down.
A three-fold increase from one hard switch per burst?!? That sounds a little hard to believe, but if it's true, then synchonized turn off is even more important .
This of course also holds for the last turnoff of the burst. Although the turn off phase is more or less random (compared with the slightly after it trips the peak current limit), this would still be a big problem. Since a JK flip flop is already used (at least that is the most common fix), it is easy to run the interrupter and over current limit through the JK, and have synchronous turn offs.
My little DRSSTC (Nicked named Little Red) uses secondary feedback and I can push it harder than my Primary feedback coils in pulse mode on the interrupter. I just can not blow it up (I have tried) I did lose one IGBT due to a primary hit but now push sparks up and away from primary. As long as I keep the duration to 125us, the coil will run for 25 mins and any bit rate and pulse mode I want. Never attempted to build a big DRSSTC with secondary feedback as may create a black hole and suck me up, he he. ....
With the on time and current limit set right, primary feedback coils should be just as tough :P
It is interesting as on Primary feedback, that I have had continued existence on sparks hitting Primary, guess the OCD really does work well (fast little bugger), but on Secondary feedback, just one little whippy spark touched the primary and POP, Ahhhhhhhhhhhhh. So now all my primaries are hidden under plexy with ground strike protection. Poor DRSSTC’s just do not like sparks hitting primaries
OCD, if used with typical syncronous shut down will not do anythin until the end of the cycle, and shouldn't have anything to do with protecting from primary strikes.
I think surviving primary strikes is more about being able to deal with large common mode spikes (and keeping it decoupled well so it is all common mode) rather than which system of feedback is used.
My old DRSSTC survived numerous primary strikes, but one strike did kill it. The 120v mains was lying across the PCB, and arced through the insulation, torching the board :P. Once I moved the wire, and replaced the board, I would expect it to be able to handle primary strikes, but it hasn't had to deal with them since I made a strike 'cage'.
So although it can probably be designed to survive primary strikes, it's easiest to just avoid them by covering the primary :P
Select the RC time constant so that it averages out the peak current enough to provide a somewhat "smooth" signal to the LM3916 but short enough so that the peak current detector will respond fast enough to changes over all ranges of duty and peak current.
If theres no resistor in series with the capacitor, and just a bleed resistor, it should charge fast enough to catch all the peaks, stay pretty smooth, and decay as fast as you really want it to. Pretty cool little addition
Registered Member #15
Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068
wrote ...
A three-fold increase from one hard switch per burst?!? That sounds a little hard to believe, but if it's true, then synchonized turn off is even more important .
Well if you consider an IGBT that is operating close to perfect ZCS, one hard switch on turn-off can introduce some heavy losses. Whether its enough to be of concern since the normal IGBT losses under ZCS are relatively low to begin with.
wrote ...
OCD, if used with typical syncronous shut down will not do anythin until the end of the cycle, and shouldn't have anything to do with protecting from primary strikes.
It may just help with current limiting in general. During a primary strike, current will be significantly high, as expected, so the current limiting circuit would protect from this surge in current during a primary strike. However, the action may not be any different than protecting the full-bridge from an overcurrent condition during a regular ground strike.
As Christopher said, in a secondary feedback system with no current limiting protection, a primary strike would ramp up current significantly and during an actual failure, its hard to say whether the failure was a result of overvoltage or overcurrent.
[quote] If theres no resistor in series with the capacitor, and just a bleed resistor, it should charge fast enough to catch all the peaks, stay pretty smooth, and decay as fast as you really want it to. Pretty cool little addition [/quote1145904416]
Thanks. Yeah, it does look pretty cool. Totally not necessary, but i like flashing lights!!!
Registered Member #195
Joined: Fri Feb 17 2006, 08:27PM
Location: Berkeley, ca.
Posts: 1111
It looks like I started something. Eastern I definatly like your idias along with everybodys inputs. Insted of using a toroid tranformer to sample current at the output why not use current viewing resitors in each emiter to shorten the fault time. I have your book and are you refering to that fault circuitry in ISSTC II? To manage the current peaks do you think it is pausible to modulate the A and B signal's pulse widths that go the H-bridge and or adding alittle resistance in series with the primay tank. In my opto SSTC I have toasted a cupple of mosfets and this needs to be recified. Along with the feed back I am looking at fault and cuurent sensing skeems. I would think that fast acting circuitry for fault sensing is a must. thanks N.B.
Registered Member #15
Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068
teravolt wrote ...
It looks like I started something. Eastern I definatly like your idias along with everybodys inputs. Insted of using a toroid tranformer to sample current at the output why not use current viewing resitors in each emiter to shorten the fault time. I have your book and are you refering to that fault circuitry in ISSTC II? To manage the current peaks do you think it is pausible to modulate the A and B signal's pulse widths that go the H-bridge and or adding alittle resistance in series with the primay tank. In my opto SSTC I have toasted a cupple of mosfets and this needs to be recified. Along with the feed back I am looking at fault and cuurent sensing skeems. I would think that fast acting circuitry for fault sensing is a must. thanks N.B.
The problem with using current sense resistors in series with the emitter or collector is that you are now doing high-side sensing. A current sense transformer can sample the current and its level is already isolated from the output of the bridge and you are ready to go. With current sense resistors on the bridge, you'll have to use optocouplers or transformers to get the signal back to your controller.
Response time isn't an issue. With a current transformer, you can still shutdown within one cycle. Modulation of the A and B is possible but not necessary. Its just as easy to have a complete shutdown for the duration of the pulse burst should an overcurrent detection be detected.
Again, with the fast acting circuitry, the current transformer approach is plenty fast for our application and in almost all cases, shutdown will occur at the cycle the fault was detected.
Registered Member #195
Joined: Fri Feb 17 2006, 08:27PM
Location: Berkeley, ca.
Posts: 1111
sorry, slip of the fingers. Thanks Daniel, my setup uses opticaly isolated gates insted of transformers. each gate has its own supply and 14A gate driver IC (ixdd414pi) for each mosfet. There are high side and low side fets for A and B. In a lot of official H-bridge designs they use emiter current sensing for fault detection and sending it back to a controler is not a problem. At presant I am looking for idias on fualt circuitry on the controle side. simotainously I will probly try the transformer method for current sensing. There is a set of chips that ixys makes (IXBD4411,IXBD4410) do you think that thay wuold be sutible for a tesla
Registered Member #15
Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068
Well, typically they wouldn't monitor emitter current for fault detection, but rather monitor the voltage between collector and emitter. This is usually known as a desaturation detector and can be used quite effectively to protect against short circuit conditions. However, it may not work satisfactorily with all devices. It is a common practice though with large IGBT bricks.
Registered Member #146
Joined: Sun Feb 12 2006, 04:21AM
Location: Austin Tx
Posts: 1055
Using a current transformer on the primary is so simple, it seems rediculous to do it any other way. Though, i must say that watching the CEsat voltage would be nice to check for shoot-through conditions. Still seems difficult to implement, though...
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DRSSTC,what type of feed back is the best
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