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Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
I have never considered this problem and my previous SSTC ran fine.
The FETs I'm gonna use (and this seems to be similar for most fast FETs) have ~50ns longer turn-off than turn-on. Will this be a problem when driven from a (low-leakage) GDT and no deadtime?
Edit: Looking at the transfer characteristics, the drain current does seem to "stabilize" to less than 80A (well at <25V D-S at least). Considering the max pulse current is 88A, I should be relatively safe... What do you think?
Registered Member #1225
Joined: Sat Jan 12 2008, 01:24AM
Location: Beaumont, Texas, USA
Posts: 2253
Dead-time is good. Read that site that you provided and you will see what i mean.
I am currently reading it, and wow, it is pretty good. More dead-time you have, the more reverse current you get. That results in higher freewheeling diode current, which increases reverse recovery time. It would be less problematic if you had your own external diode, on a heatsink.
You general want small dead-time, just large enough to keep the mosfets from cross-conducting.
Is this off topic?
Dr. Kilovolt, why not just integrate some dead-time? I have never dealt with deadtime, but i am sure it could be something quite simple, just a few small passive components.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
An ideal GDT with perfect coupling driving both MOSFETs _directly_ should prevent shoot-through. This is because the gate-source voltage of one MOSFET in the bridge leg would ideally be equal to the gate-source voltage of the other MOSFET only with its sign reversed. i.e. The instantaneous Vgs of one device would ideally be equal to minus the instantaneous Vgs of the other device. This prevents cross conduction in the ideal world.
However in practice, each winding of the GDT has leakage inductance, and there is often a damping resistor of 5 or 10 ohms between each winding and the MOSFET to control overshoot and ringing at switching transitions. When combined with the gate source capacitance of the MOSFET this acts to slow the rate of change of gate-source voltage. In practice the situation is even more complex since the drain-gate (Miller capacitance) is what really determines switching speed, and the effect of this depends on what the drain source voltage is doing.
In short it all gets very complex, and the best thing to do is to manually add in some dead-time of a few hundred nanoseconds. This prevents cross-conduction if their is leakage inductance in the GDT, too much gate damping resistance, mismatched gate-source capacitances, miller effect or whatever else you haven't thought of! A small amount of dead-time does no harm whatsoever, and it is certainly more tolerable than a small amount of cross-conduction (shoot-through) which typically wreaks havoc (particularly in terms of voltage spikes, ringing and EMC compliance failure!) Most low frequency, high power inverters typically use between 1 and 2 us of deadtime to eliminate any chances of cross-conduction for all load power factors.
I think I was the one who actually said that too much dead-time is bad in a solid-state tesla coil application. This is also true. Let me explain. In a perfectly tuned solid-state tesla coil the switching transitions of the inverter take place near the zero crossings of the tesla coil's sinusoidal load current. Therefore the duration for which the load current free-wheels through the diodes during the deadtime is very close to the current zeros. As the dead-time is increased this argument is not as valid, and the diodes start to carry more significant load currents. Depending on the relative tuning of the inverter the diodes can have to carry a significant current for a significant time if the dead-time is over exagerated. They can even undergo forced reverse recovery at the end of the free-wheeling period if the combined load on the inverter is of net capacitive power factor. So in short, the deadtime should be kept to a minimum value that is consistent with preventing cross-conduction of the switches under all possible load conditions.
Most PWM controller IC's for switch-mode power supplies automatically incorporate a small amount of dead-time by limiting the maximum duty cycle to something like 95%. This results in a 3-level drive waveform to the GDT where the gate-source voltage at the secondaries of the transformer momentarily lingers around 0 volts when transitioning from +15V to -15V. Like this:
Registered Member #1024
Joined: Sun Sept 23 2007, 10:56AM
Location: Northern NSW, Australia
Posts: 95
Dr. Kilovolt wrote ...
I have never considered this problem and my previous SSTC ran fine.
The FETs I'm gonna use (and this seems to be similar for most fast FETs) have ~50ns longer turn-off than turn-on. Will this be a problem when driven from a (low-leakage) GDT and no deadtime?
This problem is significant when driving big IGBT bricks where the delay discrepancies tend to be large. Hence the common practice of placing a fast Schottky diode parallel to the gate drive resistor. This combination provides a soft turn on via the resistor which helps minimize ringing, and a hard turn off via the diode minimizing the discrepancy between turn on / turn off times. The same arrangement in my experience is useful for minimizing cross conduction in small FET bridges, even though the discrepancies are much smaller.
Its just a matter of playing with the value of the gate resistor to obtain a suitable waveform, and minimum no load current draw from the bridge with minimum ringing.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
GeordieBoy wrote ...
An ideal GDT with perfect coupling driving both MOSFETs _directly_ should prevent shoot-through. This is because the gate-source voltage of one MOSFET in the bridge leg would ideally be equal to the gate-source voltage of the other MOSFET only with its sign reversed. i.e. The instantaneous Vgs of one device would ideally be equal to minus the instantaneous Vgs of the other device. This prevents cross conduction in the ideal world.
However in practice, each winding of the GDT has leakage inductance, and there is often a damping resistor of 5 or 10 ohms between each winding and the MOSFET to control overshoot and ringing at switching transitions. When combined with the gate source capacitance of the MOSFET this acts to slow the rate of change of gate-source voltage. In practice the situation is even more complex since the drain-gate (Miller capacitance) is what really determines switching speed, and the effect of this depends on what the drain source voltage is doing.
In short it all gets very complex, and the best thing to do is to manually add in some dead-time of a few hundred nanoseconds. This prevents cross-conduction if their is leakage inductance in the GDT, too much gate damping resistance, mismatched gate-source capacitances, miller effect or whatever else you haven't thought of! A small amount of dead-time does no harm whatsoever, and it is certainly more tolerable than a small amount of cross-conduction (shoot-through) which typically wreaks havoc (particularly in terms of voltage spikes, ringing and EMC compliance failure!) Most low frequency, high power inverters typically use between 1 and 2 us of deadtime to eliminate any chances of cross-conduction for all load power factors.
I think I was the one who actually said that too much dead-time is bad in a solid-state tesla coil application. This is also true. Let me explain. In a perfectly tuned solid-state tesla coil the switching transitions of the inverter take place near the zero crossings of the tesla coil's sinusoidal load current. Therefore the duration for which the load current free-wheels through the diodes during the deadtime is very close to the current zeros. As the dead-time is increased this argument is not as valid, and the diodes start to carry more significant load currents. Depending on the relative tuning of the inverter the diodes can have to carry a significant current for a significant time if the dead-time is over exagerated. They can even undergo forced reverse recovery at the end of the free-wheeling period if the combined load on the inverter is of net capacitive power factor. So in short, the deadtime should be kept to a minimum value that is consistent with preventing cross-conduction of the switches under all possible load conditions.
Most PWM controller IC's for switch-mode power supplies automatically incorporate a small amount of dead-time by limiting the maximum duty cycle to something like 95%. This results in a 3-level drive waveform to the GDT where the gate-source voltage at the secondaries of the transformer momentarily lingers around 0 volts when transitioning from +15V to -15V. Like this:
-Richie,
Yeah. Seeing that not many people are still understanding the true purpose of dead time in SSTC's, I'd add something (although it was said by Richie many times but usually got ignored).
The main reason to use deadtime, isn't to prevent cross conduction. Cross conduction is actually pretty nonexistent due to delay times of the mosfets alone.
Rather, it's main purpose at frequencies this high is to produce ZVS, eliminating drain capacitance and diode recovery losses. At over 100kHz these become major source of losses on mosfets, and are the first thing to be dealt with; no matter if mosfets are IRFP450's or ultrafast metal gate types they'll both suffer from drain capacitance losses pretty much the same.
The topology used to enable ZVS operation is known as class DE, or quasi-resonant ZVS operation in other cases. The main feat is having an amount of inductive reactance on output of the bridge; either with slightly detuning a resonant network, or using commutating inductance on the output of the bridge. In case of the SSTC, the magnetizing inductance of the primary plays the role, while we can drive the coil at resonance. Deadtime should now be set just a bit longer than 1/4 of period of resonant frequency between this commutating inductance and mosfet's drain capacitances.
What happens, is, that the magnetizing current is now going to drain and recycle the energy from output capacitance just before the mosfet turns on, while diodes cease conducting without full supply voltage slammed on them in reverse - that it, forced recovery.
If deadtime is too long though, more than 1/2 of the mentioned period, the drain voltage will ring back up and create problems.
Hence the real proper classDE operation results in a drain waveform resembling squarewave with sine-like slopes.
One thing that can be done with class DE is adding capacitors in parallel to D-S. They act as snubbers and reduce di/dt losses, but require either a larger deadtime or more magnetizing current to drain out. Ultimately, as frequency is increased, the deadtime becomes a dominant part of the cycle and class E becomes a better suited topology.
The interesting fact is, that probably most of you have ran your coils in a sort-of class DE without even knowing it. Since magnetizing inductances of SSTC primaries are so low, only a very short amount of deadtime can be enough to achieve ZVS, and often just the mosfet delays may be enough without any real programmed deadtime (eventually, some diodes parallel to gate resistors).
Many of you may have noticed that your mosfets get very hot with too large number of primary turns, and then mysteriously colder as number of turns is decreased to some value despite the power throughput increases!
Still, probably the most proper thing to do is to actually have a dedicated logic-based deadtime generator in the driver circuit.
Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Hi Marko, thanks for the interesting post. However I think it's not such a big problem as you make it seem.
I did some calculations: Standard SSTC model - IRFP450 halfbridge, 320V DC supply, 250kHz switching. The effective output capacitance based on the datasheet is 110pF. Calculating the power P=J/s=J*f=0.5*C*V^2*f= 1.4 Watts. While not negligible, I think it won't cause any problems. Of course using larger devices and higher frequencies makes this problem quite noticable, but for medium to large coils I think it won't make any difference to include the deadtime.
What I'm more worried about, is that most FETs have longer turn-off time than turn-on. If you use a low-leakage GDT, this could result in some cross-conduction, possibly dissipating much more than a watt or even destroying the devices instantly or after some time.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
While not negligible, I think it won't cause any problems.
I thought so as well, until I had IRFP450's fry quickly at 650kHz while driving resistive load (base-fed TC secondary), but they were also not heatsinked well. I remember being puzzled on what could cause these losses with what appeared as ''perfect ZCS'' without any magnetizing current at all - and I had few tens of watts of dissipation out of ''nothing''.
Diode recovery losses are pretty destructive alone, apparently much more than output capacitance losses. Bypassing the diodes may help somewhat but it is rather costly, and fast diodes add more capacitance themselves.
If you intend to use those mosfets at 250kHz, I think some variable deadtime logic is a must. If your deadtime is truly too small, you'll have diode recovery losses which are pretty much like few tens of ns of shoot through anyway, considering slowness of mosfet body diodes. With class DE, the diodes will end conduction with adjacent mosfet turning on instead of having full supply voltage slammed on them in reverse.
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Bridge cross-conduction
