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Registered Member #135
Joined: Sat Feb 11 2006, 12:06AM
Location: Anywhere is fine
Posts: 1735
For simulations Multisim I agree would be comparativily easy
Or if you have access at College to Cadence, there's that option, however...Specter sucks and causes a lot of delays! its really touchy..really touchy!
Registered Member #27
Joined: Fri Feb 03 2006, 02:20AM
Location: Hyperborea
Posts: 2058
This book are OK if you need some low-level VHDL intro tips:
I will look into it, I have had a look in quite a few books without finding anything remotely what I am looking for. I don't want simulation and I don't want workflow. I just need the tricks I need to make a CPU in one page of code in one afternoon.
What Clock speed did you want?
1 MHz would be plenty, it is much more efficient than most classic microprocessors so it does not need a high frequency to be useful. On the FPGA I am hoping for 10 MHz without messing around with pipelining or 20 MHz if it has to use two clock cycles for each instruction. I am not sure how it will work out with reading and writing to the register bank on the same cycle on a FPGA.
I have used Proteus VSM to check that it runs programs correctly.
Registered Member #65
Joined: Thu Feb 09 2006, 06:43AM
Location:
Posts: 1155
At 20 MHz your limit should be around 10 to 15 metres absolute trace length maximum minus (n * gate settling times + m*clock settling time + p*latch settling time etc.) may limit this further.
Circuit and bus cross-talk was a far more serious problem then systems of today. But I have seen systems running at only a few MHz run into noise related problems.
The nice thing with total clock control is you can ramp up the clock once it is working to find out exactly where the board turns chaotic and know your max clock speed.
I like Harvard architecture in many ways. But finding a decent compiler skeleton for it is practically impossible (Unless the intended audience is all Forth programmers.)
It is true though, finding books and material about core designs is not everyday reading. One of the old systems I reverse engineered had a bunch of ISA style plugs on a bus board with power etc. and all parts (CPU had several boards) would plug into it. I thought it was funny because it seemed rather familiar to the relatively more recent industrial units, and the removable Mac motherboard designs.
Technology seems to travels in cycles, I hear even magnetic RAM may make a comeback. (Not a joke... Shiver...)
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A 16 bit CPU implemented in 7400 series logic
