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Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
Steve Conner wrote ...
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
Thanks steve,
but hm, why is that? I don't understand how can two far-away different load conditions actually have same effect on the primary circuit?
And that it's somehow most 'matched' (current growing slowest?) just under streamer load?
BTW nice to see you back, steve, hope to see you in this 'hobby' more from now
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
Marko,
s/c implies no voltage, and o/c implies no current flow. So therefore both of these conditions can not be transferring any power out of the DRSSTC system. Hence voltages and currents within the network continue to rise until I²R losses match the incoming power from the driver.
It is interesting to do a parametric AC sweep simulation of the DRSSTC arrangement to see how the sharpness of the resonant peaks changes with varying "spark load" (between toroid and ground.) With the secondary open circuit, you get two sharp (high Q) resonant peaks at the usual split frequencies. With the secondary short circuited, you get a single sharp (high Q) peak at a frequency slightly higher than the natural resonant frequency of the primary on its own. All other loadings give curves in between these two extremes. I remember discussing this stuff with Steve C a few years ago, so he might even have pictures on his website showing these plots.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
Marko,
s/c implies no voltage, and o/c implies no current flow. So therefore both of these conditions can not be transferring any power out of the DRSSTC system. Hence voltages and currents within the network continue to rise until I²R losses match the incoming power from the driver.
It is interesting to do a parametric AC sweep simulation of the DRSSTC arrangement to see how the sharpness of the resonant peaks changes with varying "spark load" (between toroid and ground.) With the secondary open circuit, you get two sharp (high Q) resonant peaks at the usual split frequencies. With the secondary short circuited, you get a single sharp (high Q) peak at a frequency slightly higher than the natural resonant frequency of the primary on its own. All other loadings give curves in between these two extremes. I remember discussing this stuff with Steve C a few years ago, so he might even have pictures on his website showing these plots.
OK, this is how I understood this now:
If I simplify everything to having just one resonant tank (primary circuit), and a load of resistance R, if R is very high or very low I'll in both cases have high currents because high load resistance will allow lots of resonant rise, and too low R will start acting as a short itself.
Only at condition where R load equals characteristic impedance of the tank, it's Q will be = 1 and no resonant rise would occur; at that point current would be U/R and lowest it can ever be?
Banned on 3/17/2009. Registered Member #487
Joined: Sun Jul 09 2006, 01:22AM
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Posts: 617
I think the dangers are higher in primary feedback coils. Ive tried running primary feedback with no breakout and it did not work. Without breakout the primary voltage builds up like crazy and everything gets hot and never achieves breakout. It seems like primary feedback relies more on insane primary currents building up and creating the voltage along with the streamer loading to achieve good sized sparks.
With secondary feedback it seems kinda like the opposite as if all that is happening in the secondary instead. The primary isn't as close to resonance with feedback taken from secondary and isn't creating insane amounts of voltage and current with that high Q tank being perfectly tuned. My tunning is never perfect either. I don't always use a tap able primary. Sparks might be smaller but everything is cold and happy. Secondary feedback is less Dependant on this it seems more like a regular SSTC. I'm not a math wiz. so thats about as technical as I can get with this.
Registered Member #1232
Joined: Wed Jan 16 2008, 10:53PM
Location: Doon tha Toon!
Posts: 881
Without a breakout point installed on the toroid, the voltage rises higher at the start of each RF burst because of the greater radius-of-curvature and lower localised field. This higher toroid voltage is accompanied by a high inverter load current - this is well known.
Once the toroid actually breaks out at this higher voltage, from my experience the terminal voltage drops and is more-or-less clamped at the same voltage that it would have been if a breakout point had been used anyway. I never saw a significant difference in spark length with or without employing a breakout point.
But EVR's point is valid. The peak current stress on the silicon in the inverter is higher if you don't use a sharp point on the toroid to make it break out early during the ring-up. It is I²t that fuses semiconductors so whether they can tolerate this condition depends on how high the current peak is, and how long it persists before the toroid does breakout and the inverter current falls to a safer level. Poor heatsinking and high junction temperatures to start with can only make reliability worse.
Another thing that can be bad for SSTC's is running them with reduced supply voltage where they are just below breakout for a prolonged period of time. Large circulating currents persist and devices can overheat.
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