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Another SISG-related query: IGBT gate TVS voltage?

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J. Aaron Holmes

Fri Jan 04 2008, 05:16AM

Registered Member #477 Joined: Tue Jun 20 2006, 11:51PM
Location: Seattle, WA
Posts: 546

I'm sure this will turn out to be a dumb question. But oh well

I notice that the gate TVS in Terry's original design is 33V. I also notice that virtually every IGBT datasheet has "Vge = +/- 20V" in the "Absolute Maximum Ratings" section. Hmmm... Ok. So why use a 33V TVS? Let me guess: Is it because the +/- 20V figure is measured *at the silicon*, and the TVS value has to accomodate the emitter lead inductance during peak current? If the answer is "yes", then I'm assuming I do *NOT* want to use a 33V TVS to protect the gate of a brick-based SISG where the gate voltage is referenced to Kelvin instead of the power emitter. Why? Because in this latter case, since Kelvin is carrying almost no current, I would expect it to approximate the voltage at the silicon. So in the brick case, shouldn't I use a gate TVS (between gate and Kelvin) that reflects the actual maximum rated voltage of the gate?

(in case Finn Hammer reads this: Since you mentioned blowing IGBT gates in my other thread, I suppose I've been stuck theorizing about it)

Cheers,
Aaron, N7OE

Wolfram

Fri Jan 04 2008, 06:36AM

Registered Member #33 Joined: Sat Feb 04 2006, 01:31PM
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Posts: 971

We usually run IGBTs far beyond the datasheet max pulsed current, especially in SISGs. The extra gate voltage makes sure the IGBT can support all the current. If the gate voltage is too low, the voltage across the IGBT will rise when you get past a certain current, the losses will skyrocket, and the IGBT will (most likely) blow. I'm not entirely sure if this is right, so feel free to correct me.

Edit: Just looked at the CM600 datasheet, and it seems that 33V is a bit overkill. The CM600 should be able to support around 4kA at a Vge of 20V. at 33V, it's something like 8kA. IIRC Finn measured 4.5kA in a CM600 BRISG-based coil, so you want to stay a bit above 20V and add some headroom.

J. Aaron Holmes

Fri Jan 04 2008, 06:44AM

Registered Member #477 Joined: Tue Jun 20 2006, 11:51PM
Location: Seattle, WA
Posts: 546

In Terry's SISG circuit, however, the gate drive voltage is "only" 25V (the capacitor supplying the gate has a 25V TVS across it). So if the intent were to feed the gate 33V, I would have expected the capacitor to have a 33V TVS across it also. Yet it does not. I can therefore only assume that the 33V TVS is to accomodate something not expanded on in his document (e.g., the emitter inductance).

Cheers,
Aaron, N7OE

Wolfram

Fri Jan 04 2008, 06:51AM

Registered Member #33 Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971

Where can I find the schematic for this?

J. Aaron Holmes

Fri Jan 04 2008, 07:03AM

Registered Member #477 Joined: Tue Jun 20 2006, 11:51PM
Location: Seattle, WA
Posts: 546

Here's the full skinny:
http://drsstc.com/~sisg/files/SISG.pdf

Cheers,
Aaron, N7OE

Wolfram

Fri Jan 04 2008, 09:41AM

Registered Member #33 Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971

Ah, I didn't realize there was an other TVS limiting the gate voltage to 25V. It seems like the 33V TVS is just there to protect from spikes that could be coupled to the gate through the miller (C-G) capacitance and spikes caused by the inductance of the wiring.

Tom540

Fri Jan 04 2008, 03:54PM

Banned on 3/17/2009.
Registered Member #487 Joined: Sun Jul 09 2006, 01:22AM
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This reminds me of. I always wondered about why people used 33v zeners. They do make 30v zeners and when using them with a UCC driving a 1:2 gate drive xformer @ 33v doesn't actually do much.

Of course this might be irrelevant in SISG.

Dalus

Fri Jan 04 2008, 04:03PM

Registered Member #639 Joined: Wed Apr 11 2007, 09:09PM
Location: The Netherlands, Herkenbosch
Posts: 512

Tom540 wrote ...

This reminds me of. I always wondered about why people used 33v zeners. They do make 30v zeners and when using them with a UCC driving a 1:2 gate drive xformer @ 33v doesn't actually do much.

Of course this might be irrelevant in SISG.

The tvs in most DRSSTC designs are used to protect the gate from overvoltaging, they're intended as a failsafe not to operate continuously.

J. Aaron Holmes

Fri Jan 04 2008, 04:26PM

Registered Member #477 Joined: Tue Jun 20 2006, 11:51PM
Location: Seattle, WA
Posts: 546

Anders M. wrote ...

Ah, I didn't realize there was an other TVS limiting the gate voltage to 25V. It seems like the 33V TVS is just there to protect from spikes that could be coupled to the gate through the miller (C-G) capacitance and spikes caused by the inductance of the wiring.

Any reason not to use a lower-voltage TVS here, then? In a brick-based SISG where Kelvin is a dedicated gate reference, it seems like the thing to worry about will be the Miller effect moreso than the lead inductance, but that may be wrong. I guess I'm just trying to understand why I wouldn't want to clamp the gate voltage to the something close to what I'm feeding it. At the very least, it seems like, as a result of using Kelvin rather than the power emitter, I should be able to reduce the TVS value somewhat. Is that reasonable?

EDIT: As an added datapoint Finn mentioned (in this thread: http://4hv.org/e107_plugins/forum/forum_viewtopic.php?36703) that he stopped blowing gates when he placed the TVS (I'm assuming 33V) from Gate to Emitter instead of Kelvin. Assuming this change was indeed the reason why the gates stopped blowing, then it seems like pretty strong evidence that the inductance of the emitter lead factored in the choice of TVS value in Terry's original design, yet this may be incorrect for a brick. I.e., the 33V TVS was "too big" to be used with reference to Kelvin and didn't protect anything, however when connected Gate-to-Emitter, the inductance of the Emitter caused the voltage across the TVS to increase, in turn causing it to fire earlier.

So I guess it all boils down to this: Should the Miller effect influence my choice of TVS, or may I regard it simply as another "bad" thing and try to clamp the gate to whatever voltage I'm supplying (again, assuming the inductance may be ignored in the brick case)?

Cheers,
Aaron, N7OE

Tom540

Fri Jan 04 2008, 05:21PM

Banned on 3/17/2009.
Registered Member #487 Joined: Sun Jul 09 2006, 01:22AM
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Dalus wrote ...

The tvs in most DRSSTC designs are used to protect the gate from over voltage, they're intended as a failsafe not to operate continuously.

I know but the voltage spikes need to be a few volts over 33 on the gdt to actually cause the zeners to do anything and unless you have a ton of leakage inductance its pointless. Ive tried both 30 and 33v. 30v zeners would not be operating continuously either and make a much nicer wave form since they just start to conduct at 1 or so volts above 30 which is perfect. Why run a gdt at 30v and then try and cut the wave off if it gets around 34 or 35? you leave a margin of a few volts and your wave forms will have little spikes at the top. The goal is to get them slightly rounded with no spikes. Zeners are meant as regulators. You want the gate drive to be exactly 30 volts then you use 30v zeners.

Sisg might get higher spikes on its gates since its only relying on a cap to charge to turn the igbt on or maybe smaller. I have no idea I've never built one.

Okay I think I've beaten the dead horse enough.

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