richie wrote ...
Hi Steve,
I was just reading the thread on 4HV about Finn's SLR inverter. I agree with
all your comments entirely re: switching speed and diode recovery transients.
The only thing that seems strange is that he is trying to turn on the opposing
switch immediately after the first complete current cycle ends. You have all
the time in the world after this point, the only thing you sacrifice is a small
amount of power by introducing deadtime here. You remember the "pulse thinning
out" method of average-current control we talked about?
The beauty of the SLR converter is that the load current waveforms are
sinusoidal with low di/dt. So you're not supposed to get the switching spikes
that occur from rapidly interrupting large currents. In theory IGBT turn-on
occurs at zero current, peak current is high (which IGBTs love anyway!
),
then the load current smoothly commutates to the co-pack diode at the zero
crossing (so no tail current and diode forward-recovery problems), and finally
the diode has soft turn-off at the end of the cycle due to the slow current
reversal.
There are two actions that I would take to reduce the voltage overshoot problem.
Firstly I would introduce some deadtime so that you know that the IGBT's don't
turn on into partially conducting diodes. And secondly I would slow down the
turn-on speed of the IGBTs. Remember that the load current is a sinewave with
moderate di/dt so the turn-on of the IGBT only needs to be fast enough to
support the instantaneous load current as it rises away from zero. Anything
faster just causes snap-recovery of any conducting diodes and higher di/dt from
shock charging device capacitances.
"Richie's rule of thumb for gate-drives" is that they should be "only just fast
enough!". I usually start trying to switch the devices as quickly as possible,
then increase the turn-on resistance whilst monitoring voltage across the
device, and efficiency of the supply (losses measured by heatsink temperature.)
This has to be done at full load, but can be done at reduced buss voltage if
voltage-overshoots threaten device ratings. As you increase the turn-on time
the voltage spikes due to Ldi/dt fall in amplitude, and reverse-recovery charge
is swept out in a more controlled manner. Loses in the devices initially remain
constant, or often fall (in hard-switched converters) as the turn-on time is
increased. Eventually you reach a maximum efficiency point, then beyond this
losses start to rise again as VI overlap dominates for any further increase in
turn-on time. Allowing for component spread, this is the point where you want
to operate. This process is absolutely vital for modern commercial designs
where they have to meet high power density (efficiency) targets whilst also
meeting incredibly stringent EMI emissions standards. Textbooks that say
switching speeds should be as fast as possible are only telling half the story,
particularly if you're trying to design anything with real components that has
to have a CE mark slapped on the side! Controlling di/dt is the name of the
game.
Finally there is one other thing that can result in a non-linear "shoot-through"
type behaviour in bridges.... When each IGBT is turned on, it must charge the
emitter-collector capacitance of the opposite IGBT and its co-pack diode in
order for its own Vce to collapse. This causes a momentary current spike from
the buss cap down the bridge leg, that shock excites stray inductance in the
loop into ringing. Whilst this effect contributes most to losses when the buss
voltage is maximum (roughly a V-squared dependancy) it is sometimes most
noticeable during bench testing at low buss voltages. The reason is this...
Device capacitances are at their maximum for small applied voltages, and
decrease as the device begins blocking more applied voltage. Ldi/dt voltage
spikes due to these charging currents can appear large relative to the buss
voltage during low voltage testing, but you often find that the *percentage* of
voltage overshoot falls significantly as the buss voltage is increased. What
I'm trying to say is that a 10 volt overshoot on a 40VDC buss during testing,
doesn't necessarily mean that the overshoot will be 100v when the buss voltage
is up at 400VDC.
I don't mind if you forward this Email, and I'd be happy to hear your comments
or experiences.