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Registered Member #1403
Joined: Tue Mar 18 2008, 06:05PM
Location: Denmark, Odense C
Posts: 1968
loneoceans wrote ...
nzoomed wrote ...
Ive been working on the coil again this weekend and things are coming together nicely.
One question is regarding TVS Diodes.
Its supposed to be a good idea to put a TVS Clamp across each GDT output to protect the gates from any voltage spikes.
Im trying to find a suitable TVS diode on RS and the selection is huge.
What confuses me is that they say you need 30V TVS clamps, but i didnt think the gates of a CM300 could take much more than 20V?
I believe the voltage from the GDT is close to 19V so there is not much room for error.
When they say a 30V TVS clamp, is that supposed to be the minimum breakdown voltage or maximum breakdown voltage?
I would assume it would be the minimum. Is bi-directional the same as bipolar? Its important that they are bipolar i believe.
TIA :)
The gates of IGBTs used in coils are typically driven +15V. Datasheet maximums are +-20V, but coilers often overdrive the IGBTs. Having a greater gate voltage (e.g. +-24V) helps in a variety of ways such as forcing the IGBT into greater saturation, however at the risk of blowing out the gate, so YMMV.
From my guide:
Maximum Gate-to-Emitter Voltage (VGE)
The gate voltage is limited by the thickness and characteristics of the gate oxide layer. Though the gate dielectric rupture is typically around 80 volts, the user is normally limited to 20 or 30V to limit current under fault conditions and to ensure long term reliability.
It is normal practice to drive IGBTs at +24VDC with the Steve Ward universal driver and clones of it that most use. The reason for the gate voltage limit is not so much for protecting the gate itself, it will first break down at some 80 Volt. Higher gate voltage means higher currents can be conducted through the Collector-Emitter. We take advantage of this by pushing the gate a little over its rated voltage to allow us to conduct higher currents through the IGBT, at the cost of higher switching losses. As explained by manufacturers in the following.
It is important to note however that IGBTs exhibit relatively high gain even at high gate-emitter voltage. This is because increasing the flow of electrons by increasing the gate-emitter voltage also increases the flow of holes. The gain of a high voltage power MOSFET however is very insensitive to gate voltage once fully on.
VCE(SAT) – Collector-Emitter On/Saturation Voltage
This is the collector-emitter voltage across the IGBT at a specified collector current, gate-emitter voltage, and junction temperature. Since VCE(sat) is temperature dependent, it is specified both at room temperature and hot.
From these graphs, a circuit designer can estimate conduction loss and the temperature coefficient of VCE(sat). Conduction power loss is VCE(sat) times collector current.
It is important to find a IGBT with as low a VCE(SAT) rating as possible. The conduction losses across the IGBT scales linearly with the VCE(SAT) voltage. Collector-Emitter saturation voltage lowers dramatically at gate voltages above 12 Volt Gate-Emitter voltage, which is why a IGBT should never be driven with less than 15 Volt. Above 20 Volt the Collector-Emitter saturation voltage does not decline that much, but it is still lessened with higher gate voltage.
The gate voltage is limited by the thickness and characteristics of the gate oxide layer. Though the gate dielectric rupture is typically around 80 volts, the user is normally limited to 20 or 30V to limit current under fault conditions and to ensure long term reliability.
It is normal practice to drive IGBTs at +24VDC with the Steve Ward universal driver and clones of it that most use. The reason for the gate voltage limit is not so much for protecting the gate itself, it will first break down at some 80 Volt. Higher gate voltage means higher currents can be conducted through the Collector-Emitter. We take advantage of this by pushing the gate a little over its rated voltage to allow us to conduct higher currents through the IGBT, at the cost of higher switching losses. As explained by manufacturers in the following.
It is important to note however that IGBTs exhibit relatively high gain even at high gate-emitter voltage. This is because increasing the flow of electrons by increasing the gate-emitter voltage also increases the flow of holes. The gain of a high voltage power MOSFET however is very insensitive to gate voltage once fully on.
VCE(SAT) – Collector-Emitter On/Saturation Voltage
This is the collector-emitter voltage across the IGBT at a specified collector current, gate-emitter voltage, and junction temperature. Since VCE(sat) is temperature dependent, it is specified both at room temperature and hot.
From these graphs, a circuit designer can estimate conduction loss and the temperature coefficient of VCE(sat). Conduction power loss is VCE(sat) times collector current.
It is important to find a IGBT with as low a VCE(SAT) rating as possible. The conduction losses across the IGBT scales linearly with the VCE(SAT) voltage. Collector-Emitter saturation voltage lowers dramatically at gate voltages above 12 Volt Gate-Emitter voltage, which is why a IGBT should never be driven with less than 15 Volt. Above 20 Volt the Collector-Emitter saturation voltage does not decline that much, but it is still lessened with higher gate voltage.
Just a quick note about the IGBT gate - it's a bit more nuanced that a '80V dielectric limit' so let me elaborate a bit more since you brought it up. The voltage across the gate delectric when above a certain threshold will start to lead to a tunneling current of carriers and creates heat. Eventually after a long period of time, this will cause damage to the oxide layer since the damage caused is cumulative. Increasing your gate drive voltage per se doesn't usually lead to this effect but it will increase the baseline of any transients in gate drive. In some datasheets you might also notice that VGE max is also specified with some duty cycle and T_pulse duration for this reason. As for increased switching losses, in a typical resonant drive for inverters used in DRSSTCs, again this is more nuanced but the conduction losses far outweigh typical switching losses, though this starts to get significant in regular non-teslacoil inverter design.
Traditionally IGBTs have been 'over-driven' well past their datasheet limits with the +-24V gate drive which increases saturation current as explained by Mads, and due to the relatively low duty cycle and cumulative run times of most coils, this has been quite reliable. However modern advances in IGBT technology have lead to dramatically increased current density (which is great for cost!), but allows less 'overhead' for over driving the transistors.
Bottom line - if you're not planning to drive your CM300DY-24H at 1500A (which has been done pretty reliably in the past!), a 24V gate drive isn't critical, and I wouldn't worry about a 18-20V gate drive which will be more than sufficient for say 800A of I_pri.
Registered Member #54503
Joined: Sun Feb 22 2015, 10:35PM
Location: New Zealand
Posts: 288
Ok thanks for that info.
I had ordered some P6KE22CA TVS diodes. Clamping voltage is 30.6V and the breakdown voltage is 20.9V.
My UD is putting out about 24V at the GDT pins, so this is normal from what i understand. I have not hooked up my GDT to the driver yet, but i expect i will see some losses anyway?
Loneoceans, what is your GDT putting out on your DRSSTC3? That coil is using CM300 series like im using on my coil.
MY GDT has 14 turns like most people have on theirs.
I take it that its not idea to be clamping the whole signal if the GDT voltage is within the TVS breakdown threshold?
I do expect to run the coil up to 850A eventually, i think from memory i calculated that my MMC could handle up to 1000ApK (CDE942 series, 224nF, 5 in series x 8 in parallel), but if i can potentially run the coil up to 1500ApK, then i may consider upgrading the MMC and replacing the bus capacitors.
Going by what mads is saying, if anywhere between 20-30V on the gates is OK, then i should be alright with the TVS ive got, if i had no TVS on the gates, what would be a typical peak transient voltage if i am running them at 24V?
On a side note, an electrical engineer told me that after looking at the UD schematic, "that there is no interlock delay in the circuit, therefore on every switching transition of the IGBT gates that will conduct simultaneously,
however designed this circuit has not appreciated what is required to safely switch IGBTs."
I told him that it probably has been deliberately designed this way, since we are pushing these things to their limits.
But perhaps it does not affect operation for DRSSTC use? IDK, but im interested to hear your thoughts on this, maybe it is indeed an improvement that can be made on a future revision?
I had ordered some P6KE22CA TVS diodes. Clamping voltage is 30.6V and the breakdown voltage is 20.9V.
My UD is putting out about 24V at the GDT pins, so this is normal from what i understand. I have not hooked up my GDT to the driver yet, but i expect i will see some losses anyway?
Loneoceans, what is your GDT putting out on your DRSSTC3? That coil is using CM300 series like im using on my coil.
MY GDT has 14 turns like most people have on theirs.
I take it that its not idea to be clamping the whole signal if the GDT voltage is within the TVS breakdown threshold?
I do expect to run the coil up to 850A eventually, i think from memory i calculated that my MMC could handle up to 1000ApK (CDE942 series, 224nF, 5 in series x 8 in parallel), but if i can potentially run the coil up to 1500ApK, then i may consider upgrading the MMC and replacing the bus capacitors.
Going by what mads is saying, if anywhere between 20-30V on the gates is OK, then i should be alright with the TVS ive got, if i had no TVS on the gates, what would be a typical peak transient voltage if i am running them at 24V?
On a side note, an electrical engineer told me that after looking at the UD schematic, "that there is no interlock delay in the circuit, therefore on every switching transition of the IGBT gates that will conduct simultaneously,
however designed this circuit has not appreciated what is required to safely switch IGBTs."
I told him that it probably has been deliberately designed this way, since we are pushing these things to their limits.
But perhaps it does not affect operation for DRSSTC use? IDK, but im interested to hear your thoughts on this, maybe it is indeed an improvement that can be made on a future revision?
Quick reply:
- You mentioned previously that you were driving at 19V. If you're driving at 24V, you should using something closer to 26V TVS. Or you can simply feed ~20V DC into the UD2 DC input which is easy if you're using a switching power supply (they usually have a small adjustable pot and many 24V supplies should go down to say 20 or 21V). If you're using the UD2.7, adjust the UVLO appropriately.
- You will get 24V drive from your GDT with 24V in assuming a 1:1 winding ratio. Alternatively you can do 15 turns on the primary and 12 on the secondaries to get around 19 without changing your PSU. Alternatively, a combination of both, or you can just use a 24V gate drive and different TVSes.
- Might be a good idea to increase your MMC in the future. Your MMC is only rated to 2.5kVAC. At 60kHz with your setup you will see 10kVpk across your MMC at 850A. You can calculate the Z of your cap and multiply by Ipk to get Vpk. I think in practice it'll work fine for now.
- There is no 'typical' peak overshoot value. It depends signficantly on your gate drive setup.
- Your EE friend is absolutely correct, there is no dead-time setup in the UD2 and therefore it is essential to have fast anti-parallel diodes across the gate resistors to force the turn off to be faster than the turn-on. This is not reflected on the schematic, and in some cases, shoot-through can still be a possibility e.g. if your device is slow and your f is high. Though this is a fundamental thing to look out for in inverters. Adding dead time adjust adds quite a bit of complexity. Resonant drive also leads to a bit more nuances. Though in practice, this works ok if you know what you're doing, so it was left out in the UD2.
Registered Member #54503
Joined: Sun Feb 22 2015, 10:35PM
Location: New Zealand
Posts: 288
loneoceans wrote ...
nzoomed wrote ...
Ok thanks for that info.
I had ordered some P6KE22CA TVS diodes. Clamping voltage is 30.6V and the breakdown voltage is 20.9V.
My UD is putting out about 24V at the GDT pins, so this is normal from what i understand. I have not hooked up my GDT to the driver yet, but i expect i will see some losses anyway?
Loneoceans, what is your GDT putting out on your DRSSTC3? That coil is using CM300 series like im using on my coil.
MY GDT has 14 turns like most people have on theirs.
I take it that its not idea to be clamping the whole signal if the GDT voltage is within the TVS breakdown threshold?
I do expect to run the coil up to 850A eventually, i think from memory i calculated that my MMC could handle up to 1000ApK (CDE942 series, 224nF, 5 in series x 8 in parallel), but if i can potentially run the coil up to 1500ApK, then i may consider upgrading the MMC and replacing the bus capacitors.
Going by what mads is saying, if anywhere between 20-30V on the gates is OK, then i should be alright with the TVS ive got, if i had no TVS on the gates, what would be a typical peak transient voltage if i am running them at 24V?
On a side note, an electrical engineer told me that after looking at the UD schematic, "that there is no interlock delay in the circuit, therefore on every switching transition of the IGBT gates that will conduct simultaneously,
however designed this circuit has not appreciated what is required to safely switch IGBTs."
I told him that it probably has been deliberately designed this way, since we are pushing these things to their limits.
But perhaps it does not affect operation for DRSSTC use? IDK, but im interested to hear your thoughts on this, maybe it is indeed an improvement that can be made on a future revision?
Quick reply:
- You mentioned previously that you were driving at 19V. If you're driving at 24V, you should using something closer to 26V TVS. Or you can simply feed ~20V DC into the UD2 DC input which is easy if you're using a switching power supply (they usually have a small adjustable pot and many 24V supplies should go down to say 20 or 21V). If you're using the UD2.7, adjust the UVLO appropriately.
- You will get 24V drive from your GDT with 24V in assuming a 1:1 winding ratio. Alternatively you can do 15 turns on the primary and 12 on the secondaries to get around 19 without changing your PSU. Alternatively, a combination of both, or you can just use a 24V gate drive and different TVSes.
- Might be a good idea to increase your MMC in the future. Your MMC is only rated to 2.5kVAC. At 60kHz with your setup you will see 10kVpk across your MMC at 850A. You can calculate the Z of your cap and multiply by Ipk to get Vpk. I think in practice it'll work fine for now.
- There is no 'typical' peak overshoot value. It depends signficantly on your gate drive setup.
- Your EE friend is absolutely correct, there is no dead-time setup in the UD2 and therefore it is essential to have fast anti-parallel diodes across the gate resistors to force the turn off to be faster than the turn-on. This is not reflected on the schematic, and in some cases, shoot-through can still be a possibility e.g. if your device is slow and your f is high. Though this is a fundamental thing to look out for in inverters. Adding dead time adjust adds quite a bit of complexity. Resonant drive also leads to a bit more nuances. Though in practice, this works ok if you know what you're doing, so it was left out in the UD2.
Sorry, i probably confused you with my earlier post, I mentioned that i believed the GDT should put out 19V, but that was not my actual measurement, i assumed this was what i should be seeing going by the datasheet etc.
Yes my transformer is 1:1 so i must be driving at 24V, i thought i may have seen some losses through the transformer, but im forgetting that its current that i loose and not the voltage, feel so stupid right now!
Yes your right sorry, it was 850A limit for my MMC, I should be fine if i set my OCD to 800A. I will have to add a significant amount of capacitors if i want 1KA or more. Do you have any sources for those eurofarad doorknob caps? I cant find any on ebay, but i may just switch to those instead of upgrading, depending on how many CDE series i would need to add to my bank.
Registered Member #9879
Joined: Tue Jan 29 2013, 05:00AM
Location: New Zealand
Posts: 37
loneoceans wrote ...
- Your EE friend is absolutely correct, there is no dead-time setup in the UD2 and therefore it is essential to have fast anti-parallel diodes across the gate resistors to force the turn off to be faster than the turn-on. This is not reflected on the schematic, and in some cases, shoot-through can still be a possibility e.g. if your device is slow and your f is high. Though this is a fundamental thing to look out for in inverters. Adding dead time adjust adds quite a bit of complexity. Resonant drive also leads to a bit more nuances. Though in practice, this works ok if you know what you're doing, so it was left out in the UD2.
What's this anti-parallel diode across the gate resistor? I don't think I have seen that in any schematics anywhere and so don't have them on mine. I feel like it's something I could benefit from!
Registered Member #30656
Joined: Tue Jul 30 2013, 02:40AM
Location: UK
Posts: 208
The idea is to try and turn the IGBT off as quickly as possible (diode shorts out the gate resistor during turn-off), makes shoot-through less likely. I'm not really sure how much difference it actually makes, has anyone got any experience running a coil with/without the diodes?
Edit: realised I'm basically just repeating what was quoted. Another thing to remember is that the GTD type drive (all gates coupled via the transformer, pulls the gates negative as far as it goes positive) makes shoot-through less likely as it essentially forces the IGBTs half bridge gates to be driven exactly out of phase (only deviation is due to gate resistance, which is minimised with the anti-parallel diode)
Registered Member #9879
Joined: Tue Jan 29 2013, 05:00AM
Location: New Zealand
Posts: 37
Hydron wrote ...
The idea is to try and turn the IGBT off as quickly as possible (diode shorts out the gate resistor during turn-off), makes shoot-through less likely. I'm not really sure how much difference it actually makes, has anyone got any experience running a coil with/without the diodes?
Ah yep, makes sense. I want to try it, what would a recommended diode be?
Registered Member #54503
Joined: Sun Feb 22 2015, 10:35PM
Location: New Zealand
Posts: 288
Hydron wrote ...
The idea is to try and turn the IGBT off as quickly as possible (diode shorts out the gate resistor during turn-off), makes shoot-through less likely. I'm not really sure how much difference it actually makes, has anyone got any experience running a coil with/without the diodes?
Edit: realised I'm basically just repeating what was quoted. Another thing to remember is that the GTD type drive (all gates coupled via the transformer, pulls the gates negative as far as it goes positive) makes shoot-through less likely as it essentially forces the IGBTs half bridge gates to be driven exactly out of phase (only deviation is due to gate resistance, which is minimised with the anti-parallel diode)
I always thought those diodes were quite cruical along with the gate resistor. Supposed to stop lazy switching on the IGBT's, shorts out the resistor during turn off as you mention.
Orac, here is Steve Ward's Schematic which shows the diodes mentioned width=600
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Building my first DRSSTC - Updated thread...
width=600