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What is a "low impedance" DRSSTC? More theory

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Antonio

Thu May 29 2014, 02:52AM

Registered Member #834 Joined: Tue Jun 12 2007, 10:57PM
Location: Brazil
Posts: 644

I now understand the meaning of Qpri depending on the frequency. It is just another form of expressing the real part of the input impedance of the system. Quite elegant. After some pages of algebra I managed to find the formula, but what I obtained was a bit different:
Qpri = (Qsec/k^2) * (fsec/f)^2*(1 - f^2/fsec^2)^2 + 1/(k^2 * Qsec).
I assumed LpriCpri=LsecCsec for this.
As a numerical verification, Lpri=1, Cpri=1, Lsec=10, Csec=0.1, k=0.1, Rsec=10 results in Qsec=1, wsec=1 (rad/s), and Qpri=325 for w=2 rad/s. The other formula gives Qpri=1000.
A numerical simulation of the structure agrees with 325, with the real part of the input impedance being Rpri=sqrt(Lpri/Cpri)/Qpri=1/325 exactly at 2 rad/s.
For the tuning (1-k^2)LpriCpri=LsecCsec I get the same multiplied by (1-k^2)^0.5.
Please verify.

Uspring

Thu May 29 2014, 12:56PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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You're right. Looking at my original equations I noticed, that I had used an incorrect "definition" for Qpri and Qsec, i.e.

Qpri = 2*pi*f*Lpri / Rinp and Qsec = RL / 2*pi*f*Lsec

instead of

Qpri = sqrt(Lpri/Cpri) / Rinp and Qsec = RL / sqrt(Lseci/Csec)

The values are similar but not the same. The correct equation is:

Qpri = (Qsec/k^2) * fpri*fsec/f^2*(1 - f^2/fsec^2)^2 + fpri/fsec*1/(k^2 * Qsec).

fpri is the primary resonance f. This holds also for Lpri*Cpri not equal to Lsec*Csec and coincides with your equation for Lpri*Cpri = Lsec*Csec.

Antonio

Thu May 29 2014, 04:16PM

Registered Member #834 Joined: Tue Jun 12 2007, 10:57PM
Location: Brazil
Posts: 644

Ok. This formula covers all the tuning modes. Now the question is if just the real part of the input impedance is enough to predict the steady-state input current. The impedance seen by the driver is purely resistive at the central frequency and, if the load is light, at two other frequencies only. A driver trying to force zvs condition will track one of them. I imagine that a look at the expression for the imaginary part of the input impedance reveals what are these frequencies, that shall be put as f in the formula.

Uspring

Fri May 30 2014, 09:25AM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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Solving for the zcs frequencies algebraically seems very nasty, mountains of equations. My computer algebra program went into an endless loop.

Some general features are:
At light loads, high Qsec, there are 2 frequencies near the poles and a center one near the secondary resonance.
At heavy loads, i.e. Qsec lower than 1/k, there is one frequency left near the primary resonance.

A bit about this is here

Steve Conner

Fri May 30 2014, 09:32AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Very interesting.

I'm starting to suspect that as we drive DRSSTC resonators harder, and try to push the ratio of spark length to secondary length as far as it can go, we run into these "heavy load" conditions and this will be the ultimate limit to performance.

This would explain why the recent experiments with "secondary MMCs" worked so well: it allows a physically small resonator to have a lower impedance, thus it can support a bigger spark before its loaded Q drops below 1/k. It also explains why tighter coupling improves performance.

So, I am interested in what the driver (PLL or otherwise) does as the streamer load develops from "light" to "heavy" over the course of the burst. I've also tried solving algebraically for the ZCS frequencies and got nowhere.

With a ground strike, it can go beyond "heavy" and more or less short the secondary out, causing the primary Q to rise above 1/k again.

BTW: Is it (even approximately) true that a loaded Q of 1/k represents a maximum for power transfer? All of this theory is pointing in the direction that we should maybe design our coils to have primary and secondary loaded Qs both equal to (or somewhat greater than) 1/k when they are putting out the design spark length.

This would even give a result similar to Antonio's Butterworth filter design method, if you started out with a similar value of k to what he assumed, but I think k should just be as high as possible without risk of flashovers. If my theory is correct, then the tighter the coupling, the lower the primary loaded Q needs to be, so the less money you need to spend on tank capacitors.

Uspring

Fri May 30 2014, 01:23PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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BTW: Is it (even approximately) true that a loaded Q of 1/k represents a maximum for power transfer?

The loaded Q just tells you, how many cycles it takes to ramp up to Iocd. Perhaps you meant Qpri. I don't believe that Qsec = 1/k is necessarily a limit. A PLL, that can lock onto the primary resonance frequency, which is the only zcs f left, will continue with zcs. That involves a jump in operating frequency, which can be large if the coil was ramped up on the center f or the upper pole.
When you look at the equation for Qpri

Qpri = (Qsec/k^2) * (1 - f^2/fsec^2)^2 + 1/(k^2 * Qsec),

which is reasonably accurate for the sake of this argument, you'll see, that the first term can be close to 0 if the secondary resonance drops to the primary resonance, at which the coil will run.
The second term 1/(k^2 * Qsec) will become dominant. That does not have to be a problem, if the inverter is matched to it at the point of greatest arc length.

Steve Conner

Fri May 30 2014, 01:33PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Uspring wrote ...

I don't believe that Qsec = 1/k is necessarily a limit. A PLL, that can lock onto the primary resonance frequency, which is the only zcs f left, will continue with zcs...

The second term 1/(k^2 * Qsec) will become dominant. That does not have to be a problem, if the inverter is matched to it at the point of greatest arc length.

Yes. My question is what will happen to the power output of the coil under these conditions. Assume the driver stays locked to the ZCS frequency and maintains the primary current at the OCD value (by adjusting its average output voltage through pulse skipping, or prematurely ending the burst, which is more or less the same thing for the purposes of this discussion)

As the secondary Q falls below 1/k under heavier and heavier streamer loading, will the power output into the streamer load keep increasing? Or does it go through a maximum at Q=1/k? I feel that it must, but I can't prove it.

Uspring

Fri May 30 2014, 02:29PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
Location:
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At the point Qpri starts to increase due to the second term, the driver will start to pulse skip to keep the primary current within bounds. This will limit output power. Within the (steady state) model we've assumed the coil itself to be lossless, so input power is equal to output power, i.e.

1/2 * 4/pi * Vbus * Ipri.

Edit: What also can happen (e.g. my coil):
If Qpri gets too low at some point, Ipri might be reduced to a value that prevents arc growth.

Dr. Dark Current

Wed Jun 04 2014, 01:50PM

Registered Member #152 Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384

Not having the time now to read the whole thread, but I definitely will, as this is an interesting subject for me.

Just some of my observations (mainly from more "QCW-like" coils, so might not be 100% true for dynamic behavior in a DRSSTC pulse):
The tank circuit in a series-resonant coil (either single-resonant SSTC or dual resonant SSTC) seems to behave like a constant current sink in a steady state. The coil will not spark much if the current is below the "current sink" value, even if it is close. The required current is defined by the "volts per turn" of the primary winding. The Q of the primary tank is not constant. If you design the tank circuit for half surge impedance (2x lower L and 2x higher C), the Q will be about sqrt(2) times lower. For a given set of coils, it is almost inversely proportional to bridge output voltage.

These were just my observations. That said, the peak Q of a DRSSTC primary tank circuit usually seems to be around 10 and you must design the LC circuit according to that. If you set your current limit to a Q of 2-3, the coil will not do much, even if the current is high.
Also, I like to view the Q as a ratio of tank circuit voltage vs. bridge output voltage (average values). This makes it easy to calculate the coils and peak currents.

Steve Conner

Wed Jun 04 2014, 02:12PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Interesting. We know the discharge acts as a (somewhat soggy) voltage clamp, so this implies that an impedance inversion took place somewhere to turn it into a current sink.

This seems plausible, except that it's the opposite of what Antonio's theory predicts. He says the Tesla coil looks like an ideal transformer within its passband, and the voltage stepup ratio is constant, so a voltage clamp at the output should look like a voltage clamp at the input.

I think Uspring's analysis suggests that there could either be an impedance inversion or not, depending on the tuning and operating mode. His equation for Qpri contains both Qsec and 1/Qsec.

If there is an impedance inversion, then in the pulse skipping mode we have a current source driving a current sink, so the duty cycle, output voltage and spark length would be practically undefined.

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