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Very fast, very easy to drive, but man that is a lot of RdsON. Look at the graph towards the bottom of RdsON vs Temp; at 25C you're at 1 ohm. You'd hit 100W (max) dissipation at 10A drain current. Would be ok for a low power coil on battery voltages but that's it. I'd be hesitant to go voer 1.5-2A drain current.
Registered Member #3114
Joined: Sat Aug 14 2010, 08:33AM
Location:
Posts: 608
Sigurthr wrote ...
ZakWolf wrote ...
Chris_Knight wrote ...
Sig, you might be interested in these Pulse GDTs, which probably will work at the frequencies you want. I'm using them for my Class E work
this is an old thread
Says the man who necro-revives a 2yr+ old thread.
@Chris, yeah they look pretty decent. It's been a long time since I've done the math on my own GDTs so I don't remember their electrical characteristics anymore, I just know they work, hehe. I've tested them up to 1.25MHz (50% duty) with 18Apk current and no saturation. I'd have to run the numbers again and compare to see if the ones you linked could be suitable.
The main problem with the ideas for a DR coil as referenced in this thread was/is that the peak currents and voltages that such a prolonged ring-up (very long burst times) resulted in were incompatible with the gate drive needs of a transistor that could handle such Drain-Source stress. In addition, the idea was that by using a fixed frequency oscillator and class-E for minimal switching losses one could make a dual resonant coil in such a way as to circumvent the need for primary current sensing and feedback. The few experiments and maths I did do showed that this really wasn't feasible. The slightest detuning would throw the unit into runaway and result very quickly in silicon death.
When I get time, tools, and opportunity to work on the (regular) class-E coil I'll be able to test the two variants referenced here and report back. It isn't a high priority project though.
I know I know... Good info though.
So Sigurthr, what is the EN pin on the IXDD614 for? Im assuming like in the datasheet that if "EN" is connected to Vcc it is in "CW" mode and if its connected to an interrupter it runs in that mode relative to the input of the Fres at the "IN" pin. I was just going to use Steve's interrupter from his mini SSTC.
Also The IXDD says it can drive up to 14A peak t peak and its input voltage is recommend max at 40v. In your schematics you are driving it from 12v can you recall how much current it drew or how much is necessary to supply?
Registered Member #58280
Joined: Sat Jan 09 2016, 06:48AM
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Posts: 43
I did see that, and I was confused. How do you reconcile figure 8 and 9? 8 shows .36 @ 10a yet fig 9 shows that a junction temp of less than -50C is needed for about .36. How is this possible? I can't believe they cooled their transistor using dry ice while testing in 8
@ Chris, I trust the graph, not the quoted .36, just experience tells me that's what to do.
@Zak Yep, enable pins are usually logic-high output gating. As for the current, it directly depends on the GDT (if used) and the Ciss of your FET and the speed at which you are switching your FET.
This site has all you need to know about GDTs and the current requirements of driving a FET:
If you want a quick calculator program for it, I incorporated it into my CLI calc I made: It's option 7.
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Joined: Sat Jan 09 2016, 06:48AM
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Hey sig looks like we both learned something today.
Fig 9 is "normalized rds(on). So what that actually means is that it's a multiplier of rds on based on temperature. So 1@25C doesn't mean 1 ohm rds on, it means 1*rds (on) at the that temperature. So at 120C, the rds on will be 2 times the static value, or .64@ 5.5 amps.
So it looks like that MOSFET actually has less i2r losses than the irf630
Good find about it being a multiplier. I missed that when reading through it before, call it a brain fart, heh.
Though I see IRF630 are 85mOhm and the FETs you linked are 378mOhm, so not sure why you think it's less I2R losses, it's just less switching losses at the cost of greater conduction losses.
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