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GDT problem...

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LAN_403

RateReducer

Wed May 23 2012, 09:11PM

Registered Member #4603 Joined: Wed Apr 25 2012, 07:33PM
Location: Austria
Posts: 159

If i use the GDT driver form this circuit:

...what do i need to change to run it on 70V? (I already have a 70V powersupply)
I want to use IRF530 and IRF9530.

greetings

Neet Studio

Wed May 23 2012, 09:40PM

Registered Member #4037 Joined: Fri Jul 29 2011, 03:13PM
Location:
Posts: 86

Assuming you have power supplies for the gate driver chip, it should work as is. The gate signal is AC coupled to upper MOSFET and DC restored.

It is a matter of upping the voltage rating of all the parts (caps, diode, resistor(?), voltage regulator if any)

1N4148 is 75V, LM78XX is 35V and some caps are 16/25/50V.

Only caution is that the AC couple cap might try to pull up the bottom MOSFET gate/and the Gate driver all the way up to 70V when it is initially discharged before powered on. If the Gate driver is under powered, then the ESD clamp might try to raise the power rail which should already been stopped by a largish decoupling cap. I would try to do something about that with clamping.

RateReducer

Wed May 23 2012, 09:59PM

Registered Member #4603 Joined: Wed Apr 25 2012, 07:33PM
Location: Austria
Posts: 159

Yes, i have 12V for gate drive chip.
Okay thanks. I think it will work. I found a similar circuit that is directly supplied with 70V.

And it uses the MOSFETs that i want to use.

greetings

Neet Studio

Wed May 23 2012, 10:40PM

Registered Member #4037 Joined: Fri Jul 29 2011, 03:13PM
Location:
Posts: 86

Since the transistors are voltage followers, the gate driving voltage would only be as high as the input signal minus a diode drop. For the upper transistor, that would be 2 diodes drop as the swing is less a diode drop for high and low.

So on paper 5V TTL is not going to cut it. 5V CMOS minus 2 diodes (and D1??) would be just below 4V max on the Vth in the worse case for IRF9530.

While in real life, it would more than likely to work. Hope you input signal is higher than 5V so the MOSFET can be driven hard.

Marko

Wed May 23 2012, 10:51PM

Registered Member #89 Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145

Hello

Perhaps the first thing you should have asked yourself before proceeding - do you really need 70V gate driver supply?

Steve's circuit is well proven with large bricks such as CM300's, and it's drive capability is already ridiculously overkill in my opinion.

In practice, it's usually easiest to design 1:1 GDT's with low leakage inductance (I preferred to use RG174 coax around a ferrite toroid). High step up or step down ratios tend to be more leaky.

Then, your mosfets have RdsOn of only a few tens of miliohms, and the gate resistors you're going to use on your igbt gates will be in range of ohms, and with properly designed gdt's they'll be the main thing that limits your rise and fall times.

And then again, the brick is probably already driven so fast that it won't really care, as it will be limited by it's intrinsic turn on and turn off times.

I wouldn't use the circuit you last posted. It again has a capacitive divider which can't pass DC, and a suspicious looking totem pole driver as well (high dissipation in the upper switch, but low duty cycle is what probably saves it). Not to say that slowness of BD transistors will certainly blow your attempts to produce a massive overkill gate driver. :)

Any suitably rated mosfets with not-too-high gate capacitance will wirk in steve's driver. IRF9530 and IRF530 should do fine.

Marko

Neet Studio

Thu May 24 2012, 12:11AM

Registered Member #4037 Joined: Fri Jul 29 2011, 03:13PM
Location:
Posts: 86

There are ways of minimizing the leakage inductance if you are stepping down by an integer ratio, you could divide the primary into sections with same number of turns as the secondary, wind them together and then electrically connect them in series.

And for fractional ratios, there is this:

This winding-from-center method will increase the inductive coupling of the turns. The step-by-step process of
how to wind this part is as follows:
â— With two wires in hand, red and green (start points Start 2 and Start 3), bifi lar wind 10 turns.
â— Now add the natural wire and wind trifi lar, with three wires in hand (this stage is noted with the start point Start 1) for an additional 20 turns. Stop winding the natural wire after a total of 30 turns. This stage is reflected by the endpoint Finish 6.
â— Bifi lar wind 10 more turns with the red and green wires together, bringing these wires to a total of 40 turns. This stage is marked by endpoints Finish 4 and Finish 5.

RateReducer

Thu May 24 2012, 10:47AM

Registered Member #4603 Joined: Wed Apr 25 2012, 07:33PM
Location: Austria
Posts: 159

I donÂ´t want to use the ciruit with the BD transistors. ItÂ´s just the proof that i can run the circuit from Steve at 70V. Like Neet Sudio said "Since the transistors are voltage followers, the gate driving voltage would only be as high as the input signal minus a diode drop."
I was not sure about that...
My GDT driver works quite well with 70V and a stepped down ratio. Thats why i want to keep it ;)
The only problem is the ringing at the end thats why i need to use Steve Wards circuit.
Today i am going to order the IRF MOSFETs and an ICL7667 Mosfet driver.

In the next days i will assemble the circuit-board.
Neet Studio, your recommended GDT design sounds nice - i will compare it with my "normal" wound GDT.

greetings

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