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Registered Member #3900
Joined: Thu May 19 2011, 08:28PM
Location:
Posts: 600
hey, i just finished laying out steve ward's drsstc 3 schematic onto a single sided board in eagle. it seems i always miss a little detail and end up spending my time debugging the circuit.
anyways, i made a few minor changes such as having as little as possible on the board while still considering it a driver. this is so i can experiment with new ocd's, interrupters, etc. if i have made any obvious mistakes please let me know! i will put the picture of both the schematic and the board below, and if it helps, i can attach the .sch and .brd files in a .zip.
]drsstc1.0.zip[/file]
as for what i can tell you immediately: two of the net connections seem like they aren't connected, but if you look closely, they are.
Registered Member #3900
Joined: Thu May 19 2011, 08:28PM
Location:
Posts: 600
i will actualy have the 510, and its because i have some laying around. a few parts are placeholders for pin compatable parts. is that it? no other errors?
Registered Member #3900
Joined: Thu May 19 2011, 08:28PM
Location:
Posts: 600
come on guys, you let me down. i forgot headers for power! here's the new version, mostly the same, re-routed this time for a more compact and easy to follow board. here it is:
really though, i just got the parts in, and i want to make sure that nothing is wrong with it before i etch it. anyone want to give me a hand?
Registered Member #2288
Joined: Wed Aug 12 2009, 10:42PM
Location: Cambridge, MA
Posts: 179
It looks like you're planning to use electrolytics as bus caps on your UCC's... I would suggest ceramic caps which will be better at providing burst power needed by those chips. I usually use 1uF for this position. An electrolytic has too much ESR at the high frequencies of the square wave switch to be ideal in the position. It will likely work with electrolytic, but you can actually visually see the outputs improve if you prototype the UCC stage with and without a ceramic there.
Registered Member #3900
Joined: Thu May 19 2011, 08:28PM
Location:
Posts: 600
are there any ceramic/film caps that have the same footprint of my 'lytics? i guess i could easily switch the footprint. the reason i dont have ground planes is just for visibility issues. before i etch it, i will add them. i was also told elseware to pull the floating inverter input low, or high. should i just move the signal traces farther avay, orshould i re-route the gate drive section?
Registered Member #1854
Joined: Wed Dec 10 2008, 06:09PM
Location: West-Flanders Belgium
Posts: 88
I personnely, would use starpoint grounding. And connect (if present) the top layer to that starpoint, it wil provide shielding.
In other words: seperate the grounds from your signal input section (the one with the clamping diodes), your gate drive section and your logic section(74HC74 etc..). That will reduce the interfering of one current to another.
Also try to place the decoupling capacitors of your UCC's as close as possible, so if the ucc's take some energy from the cap's there will be less energy loss across the copper tracks.
Placing the caps closer to the ucc's will also reduce stray inductance.
Registered Member #2919
Joined: Fri Jun 11 2010, 06:30PM
Location: Cambridge, MA
Posts: 652
Your board is completely digital, so stray interference is unlikely to impair its functions. However, I would advise large decoupling caps right next to the UCC's, as loveHV said.
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drsstc 3 ss board
