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Registered Member #3640
Joined: Sat Jan 22 2011, 12:16PM
Location: Germany close to Heidelberg
Posts: 39
serge petiot wrote ...
As far as putting emitter (degeneration) resistors on the IGBT, like I've done routinely in audio amps with // transistors, I think it's a bad idea. even an 0.2 Ohms resistor as in audio amps would dissipate/waste massive amounts of power... When you run at 500 Amps...
No - you misunderstand. The "emittor" resistors go from Source to Driver - not from Source to Ground. They don't carry the main power. Check the circuits in your very first attachment - there you can see.
As far as your approach with an MMC like Bus Cap setup goes - this is probably a better solution then a single one, as long as you have the layout right. An excellent document describing low inductance layout (including the cap setup) is this: http://www.evbmw.com/igbt.pdf see page 9 following. It also treats paralleling later on. It's principles should be valid also for TO247 type IGBTs.
Registered Member #4054
Joined: Sun Aug 14 2011, 01:39PM
Location: The boonies, France
Posts: 26
Axelro, You might very well be right as I never used IGBTs but: As far as I am aware, it's not a MOS, ans it has Base, Emitter and a Collector Pin, no drain nor Source. The IGBTs we use are also NPN. I was drawing the paralell (pun non intended) to what you do in Audio power amps where you stick 0.2 Ohms resistors at the emitter of the pushpull NPN and PNP power transistor (which you do as well when using a single NPN and PNP in the pushpull though). Now, if you check the app note I first posted, you see they use "sense" resistor at each "emitter" of each IGBT, to compensate for differences in the paired IGBTs. Now my shematics is wrong as I have realised since I should put 8 "sense" resistors between emitter and gate of EACH transistor if I follow the app-note. Anyway, I have since removed them and I'll see what gives during testing. But you are right, reading your post again, Gate to Emitter resistor is not the same at all as Emitter to load resistor.
Registered Member #3640
Joined: Sat Jan 22 2011, 12:16PM
Location: Germany close to Heidelberg
Posts: 39
True - it's Gate, Emitter and Collector. Mixed the terminology up.
Anyway - just to avoid misunderstandings: It's resistors from Emitter to the Driver (in addition to the usual Gate resistor going to the other leg of the driver). Ash Small actually mentions it somewhat up the thread in his point 6. of IXYS paralleling advice as well.
I'd be curious how the paralleling behaves. Looking forward to your next steps.
Registered Member #4054
Joined: Sun Aug 14 2011, 01:39PM
Location: The boonies, France
Posts: 26
Axelro, yes, you are totally right. Well, in all honesty I was hoping NOT to have to parallel IGBTs, but, being a newbie in TCs, I'm not too sure just how much current I'll need (my secondary is off Ebay: 4"x22" winding with a 12" top load tore). What worries me a bit is that the Fop I calculated is about 200 or so Khz, which is tough to achieve with big IGBT so, I'm looking into smaller // quicker ones. That's the board sent to BatchPCB for manufacture, and it has the option anyway. At the moment, I prototyped Steve Ward's gate driver to validate my GDT. One of the 4 secondary GDT windings is driving a single IGBT connected to a 10R load with 30V at the collector. I am making interresting finds swapping between FGA40N60, IRG4PC50 and APT50GP60... Like, I really have to tailor the gate resistor to avoid ringing, and the resistor value whilst between 5 and 10R is different for each IGBT model. I can post Oscilloscope screen capture if anyone is interrested?
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new here, building DRSSTC with // IGBT Hbridge.