SSTC/DRSSTC without breakpoint
MRacerxdl, Wed Mar 26 2008, 11:39PMHi all,
I saw on the most part of the forum (and the web too), that all Solid State Tesla Coils needs to have a Breakout point, because without it I can kill the Mosfets/IGBTs.
But I found 2 guys on youtube that have made a DRSSTC and a SSTC without breakpoint.
How can it be done?
DRSSTC:
SSTC
Thanks
Re: SSTC/DRSSTC without breakpoint
..., Wed Mar 26 2008, 11:42PM
You just need to make sure that the radius of curvature on the torrid is sharp enough that you can still have breakout. On my pllsstc I used a piece of 1/4" of copper pipe which allows me to run without the breakout point.
..., Wed Mar 26 2008, 11:42PM
You just need to make sure that the radius of curvature on the torrid is sharp enough that you can still have breakout. On my pllsstc I used a piece of 1/4" of copper pipe which allows me to run without the breakout point.
Re: SSTC/DRSSTC without breakpoint
MRacerxdl, Wed Mar 26 2008, 11:53PM
Hmm, you mean I need to calculate the toroid radius to some kV of breakpoint? Using the Toroid as the breakpoint?
MRacerxdl, Wed Mar 26 2008, 11:53PM
Hmm, you mean I need to calculate the toroid radius to some kV of breakpoint? Using the Toroid as the breakpoint?
Re: SSTC/DRSSTC without breakpoint
Ken M., Thu Mar 27 2008, 12:24AM
Hey mastre.... I'd like you to check this post out , look at the authors name and then look at your videos and the author of those videos, yes the authors names are SLIGHTly different but the coils look the same, also if you look at the author of the videos "salvaged PS" vid and then look at the forums authors avatar. See any resemblances?
Ken M., Thu Mar 27 2008, 12:24AM
Hey mastre.... I'd like you to check this post out
, look at the authors name and then look at your videos and the author of those videos, yes the authors names are SLIGHTly different but the coils look the same, also if you look at the author of the videos "salvaged PS" vid and then look at the forums authors avatar. See any resemblances?Re: SSTC/DRSSTC without breakpoint
HV Enthusiast, Thu Mar 27 2008, 01:03AM
Breakout points are used because it reduces a lot of stress on the components. Considering the IGBTs and MOSFETs are already stressed to the max, adding a break-out point is simply a no-brainer and can get you magnitudes greater reliability for a given toroid size.
Plus, i think all of us here have probably run DRSSTCs without break-out points. Its not difficult, but it just overstresses components.
HV Enthusiast, Thu Mar 27 2008, 01:03AM
Breakout points are used because it reduces a lot of stress on the components. Considering the IGBTs and MOSFETs are already stressed to the max, adding a break-out point is simply a no-brainer and can get you magnitudes greater reliability for a given toroid size.
Plus, i think all of us here have probably run DRSSTCs without break-out points. Its not difficult, but it just overstresses components.
Re: SSTC/DRSSTC without breakpoint
Coronafix, Thu Mar 27 2008, 03:30AM
The second link has a breakout point.
Coronafix, Thu Mar 27 2008, 03:30AM
The second link has a breakout point.
Re: SSTC/DRSSTC without breakpoint
Tom540, Thu Mar 27 2008, 05:25AM
lol those are my coils. It has to do with how powerful your igbt's are and the toroid size. If you aren't loading the thing down with a monster toroid you can achieve breakout without a point. You also need optimum coupling. I had an SSTC a few years ago that used a full bridge of irfp450's with voltage doubler running at 400bps that could achieve breakout without a point. heres link and the small one without a breakout point
Tom540, Thu Mar 27 2008, 05:25AM
lol those are my coils. It has to do with how powerful your igbt's are and the toroid size. If you aren't loading the thing down with a monster toroid you can achieve breakout without a point. You also need optimum coupling. I had an SSTC a few years ago that used a full bridge of irfp450's with voltage doubler running at 400bps that could achieve breakout without a point. heres link
and the small one without a breakout point Re: SSTC/DRSSTC without breakpoint
MRacerxdl, Thu Mar 27 2008, 09:34AM
Good work Tom540! These are very good coils!
Someday I will try to make one sstc without breakpoint, First I need to make a new secondary coil.
MRacerxdl, Thu Mar 27 2008, 09:34AM
Good work Tom540! These are very good coils!
Someday I will try to make one sstc without breakpoint, First I need to make a new secondary coil.
Re: SSTC/DRSSTC without breakpoint
Steve Conner, Thu Mar 27 2008, 01:27PM
My DRSSTC works without a breakout point, although it tends to flash over down the inside of its secondary former instead of breaking out from the toroid. I once had the breakout point fall off in the middle of a run!
If you have a current limiter fitted, nothing bad will happen to your silicon. If it arcs over, or the current limiter kicks in before it breaks out, then you might want to try a smaller toroid.
Steve Conner, Thu Mar 27 2008, 01:27PM
My DRSSTC works without a breakout point, although it tends to flash over down the inside of its secondary former instead of breaking out from the toroid. I once had the breakout point fall off in the middle of a run!
If you have a current limiter fitted, nothing bad will happen to your silicon. If it arcs over, or the current limiter kicks in before it breaks out, then you might want to try a smaller toroid.
Re: SSTC/DRSSTC without breakpoint
Marko, Thu Mar 27 2008, 02:53PM
For most typical SSTC's, running without breakout point is a very hazardous condition which should be avoided.
When the coil is not loaded by streamer it's Q may go up several tens of times, which means that base (series) impedance of the secondary will decrease by same amount, down to about the AC resistance of the coil!
If you were already running your mosfets at edge of their ratings and the coil fails to break out, they are doomed instantly.
And even if your inverter survives, and coil still fails to break out, nearly all power put into system would be dissipated in the resistance of the coil, which would very quickly destroy itself in that state.
It is possible to run a SSTC without breakout point but at very reduced input voltage, or even direct base drive without primary at all (to give the same stress to the inverter it would normally have with streamer load). Resonator would produce very high output voltages but you wouldn't be able to see any significant sparks form it because any breakout would instantly kill it's Q.
I'd say it's one of major limitations of usual SSTC topologies like bridges or class E, is that they simply can't tolerate no load conditions without reducing the input voltage into the inverter.
For DRSSTC I believe, (hope someone can correct me) it would be opposite, since with no load the low impedance of the secondary would actually kill down the primary tank's Q and current would grow much slower than in normal operation.
Still very high voltages, as in or more than in normal operation would build up on the secondary and without streamer to grow and load it down it would be expected to find another way to discharge itself!
At least that's how I interpret what steve observed.
To compare, the primary current f the DRSSTC jumps when secondary gets heavily loaded or shorted (arc to ground), while typical SSTC would see highest base impedance with secondary shorted (most coils wouldn't be able to oscillate in their fundamental mode in this condition, though).
Marko, Thu Mar 27 2008, 02:53PM
For most typical SSTC's, running without breakout point is a very hazardous condition which should be avoided.
When the coil is not loaded by streamer it's Q may go up several tens of times, which means that base (series) impedance of the secondary will decrease by same amount, down to about the AC resistance of the coil!
If you were already running your mosfets at edge of their ratings and the coil fails to break out, they are doomed instantly.
And even if your inverter survives, and coil still fails to break out, nearly all power put into system would be dissipated in the resistance of the coil, which would very quickly destroy itself in that state.
It is possible to run a SSTC without breakout point but at very reduced input voltage, or even direct base drive without primary at all (to give the same stress to the inverter it would normally have with streamer load). Resonator would produce very high output voltages but you wouldn't be able to see any significant sparks form it because any breakout would instantly kill it's Q.
I'd say it's one of major limitations of usual SSTC topologies like bridges or class E, is that they simply can't tolerate no load conditions without reducing the input voltage into the inverter.
For DRSSTC I believe, (hope someone can correct me) it would be opposite, since with no load the low impedance of the secondary would actually kill down the primary tank's Q and current would grow much slower than in normal operation.
Still very high voltages, as in or more than in normal operation would build up on the secondary and without streamer to grow and load it down it would be expected to find another way to discharge itself!
At least that's how I interpret what steve observed.
To compare, the primary current f the DRSSTC jumps when secondary gets heavily loaded or shorted (arc to ground), while typical SSTC would see highest base impedance with secondary shorted (most coils wouldn't be able to oscillate in their fundamental mode in this condition, though).
Re: SSTC/DRSSTC without breakpoint
Steve Conner, Thu Mar 27 2008, 09:11PM
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
Steve Conner, Thu Mar 27 2008, 09:11PM
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
Re: SSTC/DRSSTC without breakpoint
Marko, Thu Mar 27 2008, 09:28PM
Thanks steve,
but hm, why is that? I don't understand how can two far-away different load conditions actually have same effect on the primary circuit?
And that it's somehow most 'matched' (current growing slowest?) just under streamer load?
BTW nice to see you back, steve, hope to see you in this 'hobby' more from now
Marko, Thu Mar 27 2008, 09:28PM
Steve Conner wrote ...
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
+1 from me on everything Marko said!
Well, except one thing maybe. As far as I know, the primary current of a DRSSTC does indeed go skyhigh if it doesn't break out. Since it also goes skyhigh if the secondary is shorted, it's actually worse than the classic SSTC.
When people first started messing around with the things, there was a lot of IGBT carnage until we started using primary current limiters. With the limiter working properly, if the coil is badly tuned or badly loaded, it'll just sit there buzzing and blinking warning lights at you, which I like a lot better than blowing up 100 dollars worth of semiconductors.
Thanks steve,
but hm, why is that? I don't understand how can two far-away different load conditions actually have same effect on the primary circuit?
And that it's somehow most 'matched' (current growing slowest?) just under streamer load?
BTW nice to see you back, steve, hope to see you in this 'hobby' more from now
Re: SSTC/DRSSTC without breakpoint
GeordieBoy, Thu Mar 27 2008, 10:25PM
Marko,
s/c implies no voltage, and o/c implies no current flow. So therefore both of these conditions can not be transferring any power out of the DRSSTC system. Hence voltages and currents within the network continue to rise until I²R losses match the incoming power from the driver.
It is interesting to do a parametric AC sweep simulation of the DRSSTC arrangement to see how the sharpness of the resonant peaks changes with varying "spark load" (between toroid and ground.) With the secondary open circuit, you get two sharp (high Q) resonant peaks at the usual split frequencies. With the secondary short circuited, you get a single sharp (high Q) peak at a frequency slightly higher than the natural resonant frequency of the primary on its own. All other loadings give curves in between these two extremes. I remember discussing this stuff with Steve C a few years ago, so he might even have pictures on his website showing these plots.
-Richie,
GeordieBoy, Thu Mar 27 2008, 10:25PM
Marko,
s/c implies no voltage, and o/c implies no current flow. So therefore both of these conditions can not be transferring any power out of the DRSSTC system. Hence voltages and currents within the network continue to rise until I²R losses match the incoming power from the driver.
It is interesting to do a parametric AC sweep simulation of the DRSSTC arrangement to see how the sharpness of the resonant peaks changes with varying "spark load" (between toroid and ground.) With the secondary open circuit, you get two sharp (high Q) resonant peaks at the usual split frequencies. With the secondary short circuited, you get a single sharp (high Q) peak at a frequency slightly higher than the natural resonant frequency of the primary on its own. All other loadings give curves in between these two extremes. I remember discussing this stuff with Steve C a few years ago, so he might even have pictures on his website showing these plots.
-Richie,
Re: SSTC/DRSSTC without breakpoint
Marko, Thu Mar 27 2008, 11:27PM
OK, this is how I understood this now:
If I simplify everything to having just one resonant tank (primary circuit), and a load of resistance R, if R is very high or very low I'll in both cases have high currents because high load resistance will allow lots of resonant rise, and too low R will start acting as a short itself.
Only at condition where R load equals characteristic impedance of the tank, it's Q will be = 1 and no resonant rise would occur; at that point current would be U/R and lowest it can ever be?
Marko
Marko, Thu Mar 27 2008, 11:27PM
Marko,
s/c implies no voltage, and o/c implies no current flow. So therefore both of these conditions can not be transferring any power out of the DRSSTC system. Hence voltages and currents within the network continue to rise until I²R losses match the incoming power from the driver.
It is interesting to do a parametric AC sweep simulation of the DRSSTC arrangement to see how the sharpness of the resonant peaks changes with varying "spark load" (between toroid and ground.) With the secondary open circuit, you get two sharp (high Q) resonant peaks at the usual split frequencies. With the secondary short circuited, you get a single sharp (high Q) peak at a frequency slightly higher than the natural resonant frequency of the primary on its own. All other loadings give curves in between these two extremes. I remember discussing this stuff with Steve C a few years ago, so he might even have pictures on his website showing these plots.
OK, this is how I understood this now:
If I simplify everything to having just one resonant tank (primary circuit), and a load of resistance R, if R is very high or very low I'll in both cases have high currents because high load resistance will allow lots of resonant rise, and too low R will start acting as a short itself.
Only at condition where R load equals characteristic impedance of the tank, it's Q will be = 1 and no resonant rise would occur; at that point current would be U/R and lowest it can ever be?
Marko
Re: SSTC/DRSSTC without breakpoint
Tom540, Fri Mar 28 2008, 04:46AM
I think the dangers are higher in primary feedback coils. Ive tried running primary feedback with no breakout and it did not work. Without breakout the primary voltage builds up like crazy and everything gets hot and never achieves breakout. It seems like primary feedback relies more on insane primary currents building up and creating the voltage along with the streamer loading to achieve good sized sparks.
With secondary feedback it seems kinda like the opposite as if all that is happening in the secondary instead. The primary isn't as close to resonance with feedback taken from secondary and isn't creating insane amounts of voltage and current with that high Q tank being perfectly tuned.
My tunning is never perfect either. I don't always use a tap able primary. Sparks might be smaller but everything is cold and happy. Secondary feedback is less Dependant on this it seems more like a regular SSTC. I'm not a math wiz. so thats about as technical as I can get with this.
Tom540, Fri Mar 28 2008, 04:46AM
I think the dangers are higher in primary feedback coils. Ive tried running primary feedback with no breakout and it did not work. Without breakout the primary voltage builds up like crazy and everything gets hot and never achieves breakout. It seems like primary feedback relies more on insane primary currents building up and creating the voltage along with the streamer loading to achieve good sized sparks.
With secondary feedback it seems kinda like the opposite as if all that is happening in the secondary instead. The primary isn't as close to resonance with feedback taken from secondary and isn't creating insane amounts of voltage and current with that high Q tank being perfectly tuned.
My tunning is never perfect either. I don't always use a tap able primary. Sparks might be smaller but everything is cold and happy. Secondary feedback is less Dependant on this it seems more like a regular SSTC. I'm not a math wiz. so thats about as technical as I can get with this.
Re: SSTC/DRSSTC without breakpoint
HV Enthusiast, Fri Mar 28 2008, 02:07PM
Well, with all the fancy math aside, if you run a DRSSTC or SSTC without a breakout point, you are going to overstress the components.
This based simply on experience - no theory required!
HV Enthusiast, Fri Mar 28 2008, 02:07PM
Well, with all the fancy math aside, if you run a DRSSTC or SSTC without a breakout point, you are going to overstress the components.
This based simply on experience - no theory required!
Re: SSTC/DRSSTC without breakpoint
Tom540, Fri Mar 28 2008, 02:30PM
I guess it depends on the coil. I can run mine hours without heating. How much can it really be stressing? I guess time will tell.
Tom540, Fri Mar 28 2008, 02:30PM
I guess it depends on the coil. I can run mine hours without heating. How much can it really be stressing? I guess time will tell.
Re: SSTC/DRSSTC without breakpoint
GeordieBoy, Fri Mar 28 2008, 03:01PM
Without a breakout point installed on the toroid, the voltage rises higher at the start of each RF burst because of the greater radius-of-curvature and lower localised field. This higher toroid voltage is accompanied by a high inverter load current - this is well known.
Once the toroid actually breaks out at this higher voltage, from my experience the terminal voltage drops and is more-or-less clamped at the same voltage that it would have been if a breakout point had been used anyway. I never saw a significant difference in spark length with or without employing a breakout point.
But EVR's point is valid. The peak current stress on the silicon in the inverter is higher if you don't use a sharp point on the toroid to make it break out early during the ring-up. It is I²t that fuses semiconductors so whether they can tolerate this condition depends on how high the current peak is, and how long it persists before the toroid does breakout and the inverter current falls to a safer level. Poor heatsinking and high junction temperatures to start with can only make reliability worse.
Another thing that can be bad for SSTC's is running them with reduced supply voltage where they are just below breakout for a prolonged period of time. Large circulating currents persist and devices can overheat.
-Richie,
GeordieBoy, Fri Mar 28 2008, 03:01PM
Without a breakout point installed on the toroid, the voltage rises higher at the start of each RF burst because of the greater radius-of-curvature and lower localised field. This higher toroid voltage is accompanied by a high inverter load current - this is well known.
Once the toroid actually breaks out at this higher voltage, from my experience the terminal voltage drops and is more-or-less clamped at the same voltage that it would have been if a breakout point had been used anyway. I never saw a significant difference in spark length with or without employing a breakout point.
But EVR's point is valid. The peak current stress on the silicon in the inverter is higher if you don't use a sharp point on the toroid to make it break out early during the ring-up. It is I²t that fuses semiconductors so whether they can tolerate this condition depends on how high the current peak is, and how long it persists before the toroid does breakout and the inverter current falls to a safer level. Poor heatsinking and high junction temperatures to start with can only make reliability worse.
Another thing that can be bad for SSTC's is running them with reduced supply voltage where they are just below breakout for a prolonged period of time. Large circulating currents persist and devices can overheat.
-Richie,
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